linux-kernel - [PATCHv4 1/4] dt-bindings: add DT binding for the layerscape PCIe controller with EP mode

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Message-Id: <20190108030922.24031-1-xiaowei.bao@nxp.com>
Date:   Tue,  8 Jan 2019 11:09:19 +0800
From:   Xiaowei Bao <xiaowei.bao@....com>
To:     bhelgaas@...gle.com, robh+dt@...nel.org, mark.rutland@....com,
        shawnguo@...nel.org, leoyang.li@....com, kishon@...com,
        lorenzo.pieralisi@....com, arnd@...db.de,
        gregkh@...uxfoundation.org, minghuan.Lian@....com,
        mingkai.hu@....com, roy.zang@....com, kstewart@...uxfoundation.org,
        cyrille.pitchen@...e-electrons.com, pombredanne@...b.com,
        shawn.lin@...k-chips.com, niklas.cassel@...s.com,
        linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linuxppc-dev@...ts.ozlabs.org
Cc:     Xiaowei Bao <xiaowei.bao@....com>
Subject: [PATCHv4 1/4] dt-bindings: add DT binding for the layerscape PCIe controller with EP mode

Add the documentation for the Device Tree binding for the layerscape PCIe
controller with EP mode.

Signed-off-by: Xiaowei Bao <xiaowei.bao@....com>
---
v2:
 - Add the SoC specific compatibles.
v3:
 - modify the commit message.
v4:
 - no change.

 .../devicetree/bindings/pci/layerscape-pci.txt     |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
index 9b2b8d6..e20ceaa 100644
--- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt
+++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
@@ -13,6 +13,7 @@ information.
 
 Required properties:
 - compatible: should contain the platform identifier such as:
+  RC mode:
         "fsl,ls1021a-pcie"
         "fsl,ls2080a-pcie", "fsl,ls2085a-pcie"
         "fsl,ls2088a-pcie"
@@ -20,6 +21,8 @@ Required properties:
         "fsl,ls1046a-pcie"
         "fsl,ls1043a-pcie"
         "fsl,ls1012a-pcie"
+  EP mode:
+	"fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep"
 - reg: base addresses and lengths of the PCIe controller register blocks.
 - interrupts: A list of interrupt outputs of the controller. Must contain an
   entry for each entry in the interrupt-names property.
-- 
1.7.1