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Message-ID: <CALMp9eQad9UkPMd+VUyCMqi07BoiOU3F5Ws_Re7o_vkd_Z-Dkg@mail.gmail.com>
Date: Tue, 8 Jan 2019 09:19:31 -0800
From: Jim Mattson <jmattson@...gle.com>
To: Wei Wang <wei.w.wang@...el.com>
Cc: Andi Kleen <ak@...ux.intel.com>,
LKML <linux-kernel@...r.kernel.org>,
kvm list <kvm@...r.kernel.org>,
Paolo Bonzini <pbonzini@...hat.com>,
Peter Zijlstra <peterz@...radead.org>,
Kan Liang <kan.liang@...el.com>,
Ingo Molnar <mingo@...hat.com>,
Radim Krčmář <rkrcmar@...hat.com>,
like.xu@...el.com, Jann Horn <jannh@...gle.com>,
arei.gonglei@...wei.com
Subject: Re: [PATCH v4 05/10] KVM/x86: expose MSR_IA32_PERF_CAPABILITIES to
the guest
On Mon, Jan 7, 2019 at 11:48 PM Wei Wang <wei.w.wang@...el.com> wrote:
>
> On 01/08/2019 02:48 AM, Jim Mattson wrote:
> > On Mon, Jan 7, 2019 at 10:20 AM Andi Kleen <ak@...ux.intel.com> wrote:
> >>> The issue is compatibility. Prior to your change, reading this MSR
> >>> from a VM would raise #GP. After your change, it won't. That means
> >>> that if you have a VM migrating between hosts with kernel versions
> >>> before and after this change, the results will be inconsistent. In the
> >> No it will not be. All Linux kernel uses of this MSR are guarded
> >> by a CPUID check.
> > Linux usage is irrelevant to the architected behavior of the virtual
> > CPU. According to volume 4 of the SDM, this MSR is only supported when
> > CPUID.01H:ECX.PDCM [bit 15] is set. Therefore, kvm should raise #GP
> > whenever a guest tries to read this MSR and the guest's
> > CPUID.01H:ECX.PDCM [bit 15] is clear.
> >
>
> Probably one more check would be better:
>
> if (!boot_cpu_has(X86_FEATURE_PDCM) ||
> !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
> return 1;
Thanks for that change!
> (host isn't expected to read this MSR when PDCM is not supported
> by the guest, so don't have "!msr_info->host_initiate" added to above)
In keeping with commit 44883f01fe6ae ("KVM: x86: ensure all MSRs can
always be KVM_GET/SET_MSR'd"), I think the host_initiated check should
be added.
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