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Message-ID: <20190115200504.GA16841@bogus>
Date:   Tue, 15 Jan 2019 14:05:04 -0600
From:   Rob Herring <robh@...nel.org>
To:     Sowjanya Komatineni <skomatineni@...dia.com>
Cc:     robh+dt@...nel.org, mark.rutland@....com, mperttunen@...dia.com,
        thierry.reding@...il.com, jonathanh@...dia.com,
        adrian.hunter@...el.com, ulf.hansson@...aro.org, anrao@...dia.com,
        devicetree@...r.kernel.org, linux-tegra@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-mmc@...r.kernel.org,
        Sowjanya Komatineni <skomatineni@...dia.com>
Subject: Re: [PATCH V4 1/3] dt-bindings: mmc: tegra: Add pinctrl for SDMMC
 drive strengths

On Thu, 10 Jan 2019 14:46:01 -0800, Sowjanya Komatineni wrote:
> Add pinctrls for 3V3 and 1V8 pad drive strength configuration for
> Tegra210 sdmmc.
> 
> Tegra210 sdmmc has pad configuration registers in pinmux register
> domain and handled thru pinctrl to pinmux device node.
> 
> Tegra186 and Tegra194 has pad configuration register with in the
> SDMMC register domain itself and are handles thru drive strength
> properties in sdmmc device node.
> 
> Signed-off-by: Sowjanya Komatineni <skomatineni@...dia.com>
> ---
>  Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 

Reviewed-by: Rob Herring <robh@...nel.org>

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