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Date: Tue, 15 Jan 2019 21:59:11 +0530 From: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org> To: Mathieu Poirier <mathieu.poirier@...aro.org> Cc: Mark Rutland <mark.rutland@....com>, devicetree@...r.kernel.org, Rajendra Nayak <rnayak@...eaurora.org>, Suzuki K Poulose <suzuki.poulose@....com>, Alexander Shishkin <alexander.shishkin@...ux.intel.com>, linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org, David Brown <david.brown@...aro.org>, Rob Herring <robh+dt@...nel.org>, Sibi Sankar <sibis@...eaurora.org>, Vivek Gautam <vivek.gautam@...eaurora.org>, Leo Yan <leo.yan@...aro.org>, Andy Gross <andy.gross@...aro.org>, linux-arm-msm-owner@...r.kernel.org, linux-arm-kernel@...ts.infradead.org Subject: Re: [PATCH 1/3] arm64: dts: qcom: sdm845: Add Coresight support Hi Mathieu, On 1/14/2019 9:05 PM, Mathieu Poirier wrote: > On Sat, Jan 12, 2019 at 06:21:00PM +0530, saiprakash.ranjan@...eaurora.org wrote: >> Hi Mathieu, >> >>>> + >>>> + etm@...0000 { >>>> + compatible = "arm,coresight-etm4x", "arm,primecell"; >>>> + arm,primecell-periphid = <0x000bb95d>; >>> >>> I'm a little curious as to why you need to bypass the normal AMBA bus >>> discovery >>> method by forcing the peripheral ID. Tracers don't show up the way >>> other >>> coresight devices do at boot time? >>> >> >> Yes on some Qcom SoC's like SDM845 and also on some previous ones, for >> ETM(only) amba bus discovery method fails because of wrong pid read from the >> registers. So we have to force this primecell peripheral ids to probe etm. > > Ok, if that is the case please add a comment to explain the situation. > Otherwise someone will assuredly ask again in the future. > Sure, will add it in the next version. Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
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