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Message-ID: <ae226b97fa2bbf9992a2727992031367@codeaurora.org>
Date: Wed, 23 Jan 2019 12:24:55 +0530
From: alokc@...eaurora.org
To: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-i2c@...r.kernel.org,
linux-spi@...r.kernel.org, linux-serial@...r.kernel.org,
Andy Gross <andy.gross@...aro.org>,
David Brown <david.brown@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Mark Brown <broonie@...nel.org>
Cc: georgi.djakov@...aro.org, dianders@...omium.org,
swboyd@...omium.org, bjorn.andersson@...aro.org,
linux-serial-owner@...r.kernel.org
Subject: Re: [PATCH 6/6] arm64: dts: sdm845: Add interconnect for GENI QUP
+Mark Brown
On 2019-01-22 12:03, Alok Chauhan wrote:
> Add interconnect ports for GENI QUPs to set bus
> capabilities.
>
> Signed-off-by: Alok Chauhan <alokc@...eaurora.org>
> ---
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index c27cbd3..fb0a8a7 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -374,6 +374,13 @@
> #address-cells = <1>;
> #size-cells = <1>;
> ranges;
> +
> + interconnects = <&rsc_hlos MASTER_BLSP_1
> + &rsc_hlos SLAVE_EBI1>,
> + <&rsc_hlos MASTER_APPSS_PROC
> + &rsc_hlos SLAVE_BLSP_1>;
> + interconnect-names = "qup-memory", "qup-config";
> +
> status = "disabled";
>
> i2c0: i2c@...000 {
> @@ -682,6 +689,13 @@
> #address-cells = <1>;
> #size-cells = <1>;
> ranges;
> +
> + interconnects = <&rsc_hlos MASTER_BLSP_2
> + &rsc_hlos SLAVE_EBI1>,
> + <&rsc_hlos MASTER_APPSS_PROC
> + &rsc_hlos SLAVE_BLSP_2>;
> + interconnect-names = "qup-memory", "qup-config";
> +
> status = "disabled";
>
> i2c8: i2c@...000 {
--
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