linux-kernel - Re: [PATCH v5 2/2] drm/panel: Add Feiyang FY07024DI26A30-D MIPI-DSI LCD panel

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Message-ID: <CAMty3ZCejdo+ztipg0F0SSpSRZwxKxTbhbXA93YqM2GFozxFqg@mail.gmail.com>
Date:   Tue, 29 Jan 2019 20:36:34 +0530
From:   Jagan Teki <jagan@...rulasolutions.com>
To:     Sam Ravnborg <sam@...nborg.org>
Cc:     Thierry Reding <thierry.reding@...il.com>,
        David Airlie <airlied@...ux.ie>,
        Daniel Vetter <daniel@...ll.ch>,
        Michael Trimarchi <michael@...rulasolutions.com>,
        dri-devel <dri-devel@...ts.freedesktop.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        linux-amarula@...rulasolutions.com
Subject: Re: [PATCH v5 2/2] drm/panel: Add Feiyang FY07024DI26A30-D MIPI-DSI
 LCD panel

Hi Sam,

On Mon, Jan 28, 2019 at 12:41 AM Jagan Teki <jagan@...rulasolutions.com> wrote:
>
> On Sat, Jan 26, 2019 at 1:22 AM Sam Ravnborg <sam@...nborg.org> wrote:
> >
> > Hi Jagan.
> >
> > Looks good, only very few nits left.
> >
> > On Sat, Jan 26, 2019 at 12:52:33AM +0530, Jagan Teki wrote:
> > > Feiyang FY07024DI26A30-D is 1024x600, 4-lane MIPI-DSI LCD panel.
> > >
> > > Add panel driver for it.
> > >
> > > Tested-by: Bhushan Shah <bshah@....org>
> > > Signed-off-by: Jagan Teki <jagan@...rulasolutions.com>
> >
> > If you consider my inputs (I know you will) then you can add my:
> > Reviewed-by: Sam Ravnborg <sam@...nborg.org>
> >
> >
> > > +     msleep(20);
> > > +
> > > +     gpiod_set_value(ctx->reset, 0);
> > > +     /* T5 + T6 (avdd rise + video & logic signal rise)
> > > +      * T5 >= 10ms, 0 < T6 <= 10ms
> > > +      */
> > > +     msleep(20);
> >
> > Please use kernel coding style comment, and maybe an empty
> > line between gpiod...() and the comment:
> >
> >         gpiod_set_value(ctx->reset, 0);
> >         /*
> >          * T5 + T6 (avdd rise + video & logic signal rise)
> >          * T5 >= 10ms, 0 < T6 <= 10ms
> >          */
> >         msleep(20);
> >
> >
> > > +static int feiyang_get_modes(struct drm_panel *panel)
> > > +{
> > > +     struct drm_connector *connector = panel->connector;
> > > +     struct feiyang *ctx = panel_to_feiyang(panel);
> > > +     struct drm_display_mode *mode;
> > > +
> > > +     mode = drm_mode_duplicate(panel->drm, &feiyang_default_mode);
> > > +     if (!mode) {
> > > +             DRM_DEV_ERROR(&ctx->dsi->dev, "failed to add mode %ux%ux@%u\n",
> > > +                           feiyang_default_mode.hdisplay,
> > > +                           feiyang_default_mode.vdisplay,
> > > +                           feiyang_default_mode.vrefresh);
> > Please consider to use DRM_MODE_FMT and DRM_MODE_ARG for printing.
>
> I see DRM_MODE_ARG as mode argument, that print all mode timings but
> here we need only 3 timings out of it. do we really need? if yes
> please suggest an example.

fyi: sent v6 for this except this change. Let me know if you have any
comments on this.