linux-kernel - Re: [PATCH 10/10] arm64: dts: allwinner: h5: Add CPU Operating Performance Points table

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Message-ID: <20190130092927.x65ihy3je5n6324w@flea>
Date:   Wed, 30 Jan 2019 10:29:27 +0100
From:   Maxime Ripard <maxime.ripard@...tlin.com>
To:     Chen-Yu Tsai <wens@...e.org>
Cc:     linux-sunxi@...glegroups.com, Icenowy Zheng <icenowy@...c.io>,
        Andre Przywara <andre.przywara@....com>,
        Emmanuel Vadot <manu@...ebsd.org>,
        Jagan Teki <jagan@...rulasolutions.com>,
        Sergey Matyukevich <geomatsi@...il.com>,
        Hauke Mehrtens <hauke@...ke-m.de>,
        linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 10/10] arm64: dts: allwinner: h5: Add CPU Operating
 Performance Points table

On Wed, Jan 30, 2019 at 04:42:03PM +0800, Chen-Yu Tsai wrote:
>  			enable-method = "psci";
>  			clocks = <&ccu CLK_CPUX>;
>  			clock-latency-ns = <244144>; /* 8 32k periods */
> +			operating-points-v2 = <&cpu_opp_table>;
> +			#cooling-cells = <2>;
> +		};
> +	};
> +
> +	cpu_opp_table: opp_table {
> +		compatible = "operating-points-v2";
> +		opp-shared;
> +
> +		opp@...000000 {
> +			opp-hz = /bits/ 64 <408000000>;
> +			opp-microvolt = <1000000 1000000 1310000>;
> +			clock-latency-ns = <244144>; /* 8 32k periods */
> +		};
> +
> +		opp@...000000 {
> +			opp-hz = /bits/ 64 <648000000>;
> +			opp-microvolt = <1040000 1040000 1310000>;
> +			clock-latency-ns = <244144>; /* 8 32k periods */
> +		};
> +
> +		opp@...000000 {
> +			opp-hz = /bits/ 64 <816000000>;
> +			opp-microvolt = <1080000 1080000 1310000>;
> +			clock-latency-ns = <244144>; /* 8 32k periods */
> +		};
> +
> +		opp@...000000 {
> +			opp-hz = /bits/ 64 <912000000>;
> +			opp-microvolt = <1120000 1120000 1310000>;
> +			clock-latency-ns = <244144>; /* 8 32k periods */
> +		};
> +
> +		opp@...000000 {
> +			opp-hz = /bits/ 64 <960000000>;
> +			opp-microvolt = <1160000 1160000 1310000>;
> +			clock-latency-ns = <244144>; /* 8 32k periods */
> +		};
> +
> +		opp@...8000000 {
> +			opp-hz = /bits/ 64 <1008000000>;
> +			opp-microvolt = <1200000 1200000 1310000>;
> +			clock-latency-ns = <244144>; /* 8 32k periods */
> +		};
> +
> +		opp@...6000000 {
> +			opp-hz = /bits/ 64 <1056000000>;
> +			opp-microvolt = <1240000 1240000 1310000>;
> +			clock-latency-ns = <244144>; /* 8 32k periods */
> +		};
> +
> +		opp@...4000000 {
> +			opp-hz = /bits/ 64 <1104000000>;
> +			opp-microvolt = <1260000 1260000 1310000>;
> +			clock-latency-ns = <244144>; /* 8 32k periods */
> +		};
> +
> +		opp@...2000000 {
> +			opp-hz = /bits/ 64 <1152000000>;
> +			opp-microvolt = <1300000 1300000 1310000>;
> +			clock-latency-ns = <244144>; /* 8 32k periods */

What is the frequency and voltage that U-Boot sets up?

We've had the issue with the A33 that it's started at 1008MHz, with
the matching voltage, and ramping up the frequency to 1.2GHz on boards
without PMIC support would increase the frequency but not the voltage,
resulting in a brownout.

Maxime

-- 
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

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