linux-kernel - [PATCH 04/10] arm64: dts: allwinner: h5: nanopi-neo2: Add CPU regulator supply

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Message-Id: <20190130084203.25053-5-wens@csie.org>
Date:   Wed, 30 Jan 2019 16:41:57 +0800
From:   Chen-Yu Tsai <wens@...e.org>
To:     Maxime Ripard <maxime.ripard@...tlin.com>
Cc:     linux-sunxi@...glegroups.com, Icenowy Zheng <icenowy@...c.io>,
        Andre Przywara <andre.przywara@....com>,
        Emmanuel Vadot <manu@...ebsd.org>,
        Jagan Teki <jagan@...rulasolutions.com>,
        Sergey Matyukevich <geomatsi@...il.com>,
        Hauke Mehrtens <hauke@...ke-m.de>,
        Chen-Yu Tsai <wens@...e.org>,
        linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: [PATCH 04/10] arm64: dts: allwinner: h5: nanopi-neo2: Add CPU regulator supply

The Nanopi Neo 2 uses a fixed regulator to supply the CPU cores. The
feedback resistor network can be changed by toggling a GPIO line. This
is effectively a GPIO controlled regulator that can change between 1.1V
and 1.3V.

Cc: Icenowy Zheng <icenowy@...c.io>
Signed-off-by: Chen-Yu Tsai <wens@...e.org>

---

This patch is based on the schematics and has not been tested on an
actual board.
---
 .../dts/allwinner/sun50i-h5-nanopi-neo2.dts   | 20 +++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
index cc268a69786c..08ffdfb78137 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
@@ -99,6 +99,26 @@
 		gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
 		status = "okay";
 	};
+
+	reg_vdd_cpux: vdd-cpux {
+		compatible = "regulator-gpio";
+		regulator-name = "vdd-cpux";
+		regulator-type = "voltage";
+		regulator-boot-on;
+		regulator-always-on;
+		regulator-min-microvolt = <1100000>;
+		regulator-max-microvolt = <1300000>;
+		regulator-ramp-delay = <50>; /* 4ms */
+		enable-gpios =  <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
+		gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL6 */
+		gpios-states = <0x1>;
+		states = <1100000 0x0
+			  1300000 0x1>;
+	};
+};
+
+&cpu0 {
+	cpu-supply = <&reg_vdd_cpux>;
 };
 
 &ehci0 {
-- 
2.20.1