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Message-ID: <af691fb9-e972-5590-77f7-754bc1018b05@microchip.com>
Date: Fri, 1 Feb 2019 14:43:18 +0000
From: <Tudor.Ambarus@...rochip.com>
To: <bbrezillon@...nel.org>
CC: <mark.rutland@....com>, <devicetree@...r.kernel.org>,
<alexandre.belloni@...tlin.com>, <linux-kernel@...r.kernel.org>,
<Nicolas.Ferre@...rochip.com>, <robh+dt@...nel.org>,
<linux-spi@...r.kernel.org>, <Ludovic.Desroches@...rochip.com>,
<broonie@...nel.org>, <linux-mtd@...ts.infradead.org>,
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v2 10/10] spi: atmel-quadspi: add support for sam9x60 qspi
controller
On 02/01/2019 09:07 AM, Tudor.Ambarus@...rochip.com wrote:
cut
>>> diff --git a/drivers/spi/atmel-quadspi.c b/drivers/spi/atmel-quadspi.c
cut
>>> +static int atmel_sam9x60_qspi_set_cfg(void __iomem *base,
>>> + const struct spi_mem_op *op,
>>> + struct atmel_qspi_cfg *cfg)
>>> +{
>>> + int ret = atmel_qspi_set_mode(cfg, op);
>>> +
>>> + if (ret)
>>> + return ret;
>>> +
>>> + ret = atmel_qspi_set_address_mode(cfg, op);
>>> + if (ret)
>>> + return ret;
>>> +
>>> + cfg->ifr |= QSPI_IFR_INSTEN;
>>> + cfg->icr |= QSPI_ICR_INST(op->cmd.opcode);
>>> +
>>> + /* Set data enable */
>>> + if (op->data.nbytes)
>>> + cfg->ifr |= QSPI_IFR_DATAEN;
>>> +
>>> + if (!op->addr.nbytes) {
>>> + cfg->ifr |= QSPI_IFR_TFRTYP_TRSFR_REG;
>>> + if (op->data.dir == SPI_MEM_DATA_OUT)
>>> + cfg->ifr |= QSPI_IFR_APBTFRTYP_WRITE;
>>> + else
>>> + cfg->ifr |= QSPI_IFR_APBTFRTYP_READ;
>>> + } else {
>>> + cfg->ifr |= QSPI_IFR_TFRTYP_TRSFR_MEM;
>>
>> Can you try doing only regular transfers and let me know if it still
>> works. Support for mem transfers can then be added along with dirmap
>> support.
>
> should work. Will try and let you know.
you were right, it works. I will let mem transfer logic for dirmap support.
Cheers,
ta
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