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Message-ID: <20190201165950.GA22887@e107981-ln.cambridge.arm.com>
Date:   Fri, 1 Feb 2019 16:59:50 +0000
From:   Lorenzo Pieralisi <lorenzo.pieralisi@....com>
To:     Andrey Smirnov <andrew.smirnov@...il.com>
Cc:     Trent Piepho <tpiepho@...inj.com>,
        Lucas Stach <l.stach@...gutronix.de>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Fabio Estevam <fabio.estevam@....com>,
        Chris Healy <cphealy@...il.com>,
        Leonard Crestez <leonard.crestez@....com>,
        "A.s. Dong" <aisheng.dong@....com>,
        Richard Zhu <hongxing.zhu@....com>, linux-imx@....com,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-pci@...r.kernel.org
Subject: Re: [PATCH v6 2/4] PCI: imx6: Mark PHY functions as i.MX6 specific

On Thu, Jan 24, 2019 at 12:15:20PM -0800, Andrey Smirnov wrote:
> PCIE PHY IP block on i.MX7D differs from the one used on i.MX6 family,
> so none of the code in current implementation of imx6_setup_phy_mpll()
> is applicable.

So :) ? Add a conclusive statement to the commit log.

Lorenzo

> Tested-by: Trent Piepho <tpiepho@...inj.com>
> Signed-off-by: Andrey Smirnov <andrew.smirnov@...il.com>
> Reviewed-by: Lucas Stach <l.stach@...gutronix.de>
> Cc: Bjorn Helgaas <bhelgaas@...gle.com>
> Cc: Fabio Estevam <fabio.estevam@....com>
> Cc: Chris Healy <cphealy@...il.com>
> Cc: Lucas Stach <l.stach@...gutronix.de>
> Cc: Leonard Crestez <leonard.crestez@....com>
> Cc: "A.s. Dong" <aisheng.dong@....com>
> Cc: Richard Zhu <hongxing.zhu@....com>
> Cc: linux-imx@....com
> Cc: linux-arm-kernel@...ts.infradead.org
> Cc: linux-kernel@...r.kernel.org
> Cc: linux-pci@...r.kernel.org
> ---
>  drivers/pci/controller/dwc/pci-imx6.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index efff3d5e9162..c55d93c1187d 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -41,8 +41,11 @@ enum imx6_pcie_variants {
>  	IMX7D,
>  };
>  
> +#define IMX6_PCIE_FLAG_IMX6_PHY			BIT(0)
> +
>  struct imx6_pcie_drvdata {
>  	enum imx6_pcie_variants variant;
> +	u32 flags;
>  };
>  
>  struct imx6_pcie {
> @@ -256,6 +259,9 @@ static void imx6_pcie_reset_phy(struct imx6_pcie *imx6_pcie)
>  {
>  	u32 tmp;
>  
> +	if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY))
> +		return;
> +
>  	pcie_phy_read(imx6_pcie, PHY_RX_OVRD_IN_LO, &tmp);
>  	tmp |= (PHY_RX_OVRD_IN_LO_RX_DATA_EN |
>  		PHY_RX_OVRD_IN_LO_RX_PLL_EN);
> @@ -573,6 +579,9 @@ static int imx6_setup_phy_mpll(struct imx6_pcie *imx6_pcie)
>  	int mult, div;
>  	u32 val;
>  
> +	if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY))
> +		return 0;
> +
>  	switch (phy_rate) {
>  	case 125000000:
>  		/*
> @@ -1088,12 +1097,15 @@ static void imx6_pcie_shutdown(struct platform_device *pdev)
>  static const struct imx6_pcie_drvdata drvdata[] = {
>  	[IMX6Q] = {
>  		.variant = IMX6Q,
> +		.flags = IMX6_PCIE_FLAG_IMX6_PHY,
>  	},
>  	[IMX6SX] = {
>  		.variant = IMX6SX,
> +		.flags = IMX6_PCIE_FLAG_IMX6_PHY,
>  	},
>  	[IMX6QP] = {
>  		.variant = IMX6QP,
> +		.flags = IMX6_PCIE_FLAG_IMX6_PHY,
>  	},
>  	[IMX7D] = {
>  		.variant = IMX7D,
> -- 
> 2.20.1
> 

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