linux-kernel - Re: [PATCH v6 0/4] PCIE support for i.MX8MQ

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Message-ID: <20190201170101.GB22887@e107981-ln.cambridge.arm.com>
Date:   Fri, 1 Feb 2019 17:01:01 +0000
From:   Lorenzo Pieralisi <lorenzo.pieralisi@....com>
To:     Andrey Smirnov <andrew.smirnov@...il.com>
Cc:     Bjorn Helgaas <bhelgaas@...gle.com>,
        Fabio Estevam <fabio.estevam@....com>,
        Chris Healy <cphealy@...il.com>,
        Lucas Stach <l.stach@...gutronix.de>,
        Leonard Crestez <leonard.crestez@....com>,
        "A.s. Dong" <aisheng.dong@....com>,
        Richard Zhu <hongxing.zhu@....com>, linux-imx@....com,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-pci@...r.kernel.org
Subject: Re: [PATCH v6 0/4] PCIE support for i.MX8MQ

On Thu, Jan 24, 2019 at 12:15:18PM -0800, Andrey Smirnov wrote:
> Everyone:
> 
> This series contains changes I made in order to enable support of PCIE
> IP block on i.MX8MQ SoCs.
> 
> Changes since [v5]:
> 
>  - Reformatted commit messages to adhere to
>    https://lore.kernel.org/linux-pci/20171026223701.GA25649@bhelgaas-glaptop.roam.corp.google.com/
> 
> Changes since [v4]:
> 
>  - Collected Reviewed-by from Lucas
> 
>  - Replaced ((ARM || ARM64) && COMPILE_TEST) with COMPILE_TEST as per
>    suggestion from Rob
> 
> Changes since [v3]:
> 
>  - Based on feedback from NXP, DIRECT_SPEED_CHANGE quirk was expanded
>    to cover both i.MX7 and i.MX8MQ
> 
>  - Code setting device type in GPR12 moved to a standalone function
> 
>  - Explicit "fsl,controller-id" binding was dropped, replaced by using
>    controller physical address to determine logical ID
> 
>  - Dropped Reviewed-by from Lucas for patch 4/4 due to the change
>    above (haven't heard explicit "yea" for it from him)
> 
> Changes since [v2], [fixes]:
> 
>  - Incorporated [patch] introducing drvdata
> 
>  - i.MX6 PHY operation gating converted to a single patch and to use a
>    dedicated flag instead of doing explicit variant check
> 
>  - Kconfig entry changed to use ARM64 && ARCH_MXC
> 
>  - Dropped FALLTHROUGH annotations
> 
> Changes since [v1]:
> 
>  - Driver changed to use single "fsl,controller-id" property to
>    distinguish between two intances of PCIE IP block
> 
>  - All code pertaining to L1SS was dropped to simplify the patch
> 
>  - Documented additions to DT bindings
> 
> Feedback is welcome!
> 
> Thanks,
> Andrey Smirnov
> 
> [v4] https://lore.kernel.org/linux-arm-kernel/20190104165335.13205-1-andrew.smirnov@gmail.com
> [v3] https://lore.kernel.org/linux-arm-kernel/20181218040702.29231-1-andrew.smirnov@gmail.com
> [patch] https://patchwork.kernel.org/patch/10712261/
> [fixes] https://lore.kernel.org/linux-arm-kernel/20181216230916.22982-1-andrew.smirnov@gmail.com
> [v2] https://lore.kernel.org/linux-arm-kernel/20181206073545.10967-1-andrew.smirnov@gmail.com
> [v1] https://lore.kernel.org/linux-arm-kernel/20181117181225.10737-1-andrew.smirnov@gmail.com/
> 
> Andrey Smirnov (4):
>   PCI: imx6: Introduce drvdata
>   PCI: imx6: Mark PHY functions as i.MX6 specific
>   PCI: imx6: Convert DIRECT_SPEED_CHANGE quirk code to use a flag
>   PCI: imx6: Add support for i.MX8MQ
> 
>  .../bindings/pci/fsl,imx6q-pcie.txt           |   3 +-
>  drivers/pci/controller/dwc/Kconfig            |   4 +-
>  drivers/pci/controller/dwc/pci-imx6.c         | 150 +++++++++++++++---
>  3 files changed, 133 insertions(+), 24 deletions(-)

Can you rebase it on top of my pci/dwc branch please and repost it ?

Thanks,
Lorenzo