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Message-ID: <4afac3e0-36f7-86a8-bdae-a6a9dcca5d90@microchip.com>
Date: Sun, 3 Feb 2019 13:54:17 +0000
From: <Tudor.Ambarus@...rochip.com>
To: <frieder.schrempf@...tron.de>, <marek.vasut@...il.com>
CC: <dwmw2@...radead.org>, <computersforpeace@...il.com>,
<bbrezillon@...nel.org>, <richard@....at>,
<linux-mtd@...ts.infradead.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/2] mtd: spi-nor: Add support for MX25V8035F
On 01/23/2019 09:56 AM, Schrempf Frieder wrote:
> From: Frieder Schrempf <frieder.schrempf@...tron.de>
>
> This adds support for the Macronix MX25V8035F, a 8Mb SPI NOR chip.
Please say who uses it and how you tested it. Looks good otherwise.
>
> Signed-off-by: Frieder Schrempf <frieder.schrempf@...tron.de>
> ---
> drivers/mtd/spi-nor/spi-nor.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index aa8a04293a25..f08ea9cf86b6 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -1849,6 +1849,8 @@ static const struct flash_info spi_nor_ids[] = {
> SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
> .fixups = &mx25l25635_fixups },
> { "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_4B_OPCODES) },
> + { "mx25v8035f", INFO(0xc22314, 0, 64 * 1024, 16,
> + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },
> { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
> { "mx66u51235f", INFO(0xc2253a, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
>
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