lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Mon, 4 Feb 2019 16:32:36 -0600 From: David Lechner <david@...hnology.com> To: Bartosz Golaszewski <brgl@...ev.pl>, Sekhar Nori <nsekhar@...com>, Kevin Hilman <khilman@...nel.org>, Thomas Gleixner <tglx@...utronix.de>, Jason Cooper <jason@...edaemon.net>, Marc Zyngier <marc.zyngier@....com> Cc: Bartosz Golaszewski <bgolaszewski@...libre.com>, linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org Subject: Re: [PATCH 06/35] ARM: davinci: wrap interrupt definitions with a macro for SPARSE_IRQ On 1/31/19 7:38 AM, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski <bgolaszewski@...libre.com> > > This is done in preparation for selecting CONFIG_SPARSE_IRQ. The > interrupt numbers will then start at the predefined NR_IRQS offset. > > For now wrap all interrupt numbers with a macro and define > DAVINCI_INTC_START to 0. Logically nothing changes for now. > > Signed-off-by: Bartosz Golaszewski <bgolaszewski@...libre.com> > --- Reviewed-by: David Lechner <david@...hnology.com> > diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h > index 03c446635301..14fa668d4e8d 100644 > --- a/arch/arm/mach-davinci/include/mach/irqs.h > +++ b/arch/arm/mach-davinci/include/mach/irqs.h > @@ -30,371 +30,374 @@ > /* Base address */ > #define DAVINCI_ARM_INTC_BASE 0x01C48000 > > +#define DAVINCI_INTC_START 0 > +#define DAVINCI_INTC_IRQ(_irqnum) (DAVINCI_INTC_START + (_irqnum)) Almost not worth mentioning, but DAVINCI_INTC_START is only ever used once, so it could be omitted.
Powered by blists - more mailing lists