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Message-ID: <201902042247.q5J2OWeu%fengguang.wu@intel.com>
Date:   Mon, 4 Feb 2019 22:43:53 +0800
From:   kbuild test robot <lkp@...el.com>
To:     Fenghua Yu <fenghua.yu@...el.com>
Cc:     kbuild-all@...org, Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, H Peter Anvin <hpa@...or.com>,
        Dave Hansen <dave.hansen@...el.com>,
        Ashok Raj <ashok.raj@...el.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Michael Chan <michael.chan@...adcom.com>,
        Ravi V Shankar <ravi.v.shankar@...el.com>,
        Ricardo Neri <ricardo.neri@...el.com>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        x86 <x86@...nel.org>, Fenghua Yu <fenghua.yu@...el.com>
Subject: Re: [PATCH v3 10/10] x86/split_lock: Handle #AC exception for split
 lock

Hi Fenghua,

I love your patch! Yet something to improve:

[auto build test ERROR on tip/auto-latest]
[also build test ERROR on v5.0-rc4 next-20190204]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Fenghua-Yu/x86-split_lock-Enable-AC-exception-for-split-locked-accesses/20190204-162843
config: x86_64-randconfig-k3-02041323 (attached as .config)
compiler: gcc-8 (Debian 8.2.0-14) 8.2.0
reproduce:
        # save the attached .config to linux build tree
        make ARCH=x86_64 

All errors (new ones prefixed by >>):

   ld: arch/x86/kernel/traps.o: in function `do_alignment_check':
   arch/x86/kernel/traps.c:310: undefined reference to `do_ac_split_lock'
   ld: arch/x86/kernel/setup.o: in function `setup_arch':
   arch/x86/kernel/setup.c:965: undefined reference to `set_ac_split_lock'
   ld: arch/x86/kernel/smpboot.o: in function `start_secondary':
>> arch/x86/kernel/smpboot.c:235: undefined reference to `set_ac_split_lock'

vim +235 arch/x86/kernel/smpboot.c

   206	
   207	static int cpu0_logical_apicid;
   208	static int enable_start_cpu0;
   209	/*
   210	 * Activate a secondary processor.
   211	 */
   212	static void notrace start_secondary(void *unused)
   213	{
   214		/*
   215		 * Don't put *anything* except direct CPU state initialization
   216		 * before cpu_init(), SMP booting is too fragile that we want to
   217		 * limit the things done here to the most necessary things.
   218		 */
   219		if (boot_cpu_has(X86_FEATURE_PCID))
   220			__write_cr4(__read_cr4() | X86_CR4_PCIDE);
   221	
   222	#ifdef CONFIG_X86_32
   223		/* switch away from the initial page table */
   224		load_cr3(swapper_pg_dir);
   225		/*
   226		 * Initialize the CR4 shadow before doing anything that could
   227		 * try to read it.
   228		 */
   229		cr4_init_shadow();
   230		__flush_tlb_all();
   231	#endif
   232		load_current_idt();
   233		cpu_init();
   234	
 > 235		set_ac_split_lock();
   236	
   237		x86_cpuinit.early_percpu_clock_init();
   238		preempt_disable();
   239		smp_callin();
   240	
   241		enable_start_cpu0 = 0;
   242	
   243		/* otherwise gcc will move up smp_processor_id before the cpu_init */
   244		barrier();
   245		/*
   246		 * Check TSC synchronization with the boot CPU:
   247		 */
   248		check_tsc_sync_target();
   249	
   250		speculative_store_bypass_ht_init();
   251	
   252		/*
   253		 * Lock vector_lock, set CPU online and bring the vector
   254		 * allocator online. Online must be set with vector_lock held
   255		 * to prevent a concurrent irq setup/teardown from seeing a
   256		 * half valid vector space.
   257		 */
   258		lock_vector_lock();
   259		set_cpu_online(smp_processor_id(), true);
   260		lapic_online();
   261		unlock_vector_lock();
   262		cpu_set_state_online(smp_processor_id());
   263		x86_platform.nmi_init();
   264	
   265		/* enable local interrupts */
   266		local_irq_enable();
   267	
   268		/* to prevent fake stack check failure in clock setup */
   269		boot_init_stack_canary();
   270	
   271		x86_cpuinit.setup_percpu_clockev();
   272	
   273		wmb();
   274		cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
   275	}
   276	

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

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