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Date:   Wed, 6 Feb 2019 16:38:56 +0000
From:   <Tudor.Ambarus@...rochip.com>
To:     <broonie@...nel.org>, <bbrezillon@...nel.org>
CC:     <robh+dt@...nel.org>, <mark.rutland@....com>,
        <Nicolas.Ferre@...rochip.com>, <alexandre.belloni@...tlin.com>,
        <Ludovic.Desroches@...rochip.com>, <Cyrille.Pitchen@...rochip.com>,
        <bugalski.piotr@...il.com>, <linux-spi@...r.kernel.org>,
        <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <linux-mtd@...ts.infradead.org>
Subject: Re: [PATCH v6 01/13] spi: atmel-quadspi: cache MR value to avoid a
 write access



On 02/06/2019 06:08 PM, Mark Brown wrote:
> On Tue, Feb 05, 2019 at 05:33:06PM +0000, Tudor.Ambarus@...rochip.com wrote:
>> From: Tudor Ambarus <tudor.ambarus@...rochip.com>
>>
>> Set the controller by default in Serial Memory Mode (SMM) at probe.
>> Cache Mode Register (MR) value to avoid write access when setting
>> the controller in serial memory mode at exec_op().
>>
>> Signed-off-by: Tudor Ambarus <tudor.ambarus@...rochip.com>
>> ---
>> v6: no change
>> v5: collect R-b
> 
> You say you've collected a reviewed-by for this but there's no
> reviewed-by on the patch?
> 

Not intended. 8/13 has the same problem. I guess I added the R-b tags after
formatting the patches, this may explain why they're gone now.

Boris, can you please add your R-b tag on 8/13 too?

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