linux-kernel - Re: [GIT PULL] x86/mm changes for v4.21

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Message-Id: <42A9C88A-DFA3-4936-BA4E-F853E5871ACF@amacapital.net>
Date:   Thu, 7 Feb 2019 15:05:54 -0800
From:   Andy Lutomirski <luto@...capital.net>
To:     Linus Torvalds <torvalds@...ux-foundation.org>
Cc:     "Luck, Tony" <tony.luck@...el.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Dan Williams <dan.j.williams@...el.com>,
        Ingo Molnar <mingo@...nel.org>,
        Linux List Kernel Mailing <linux-kernel@...r.kernel.org>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        Andy Lutomirski <luto@...nel.org>,
        Borislav Petkov <bp@...en8.de>,
        Thomas Gleixner <tglx@...utronix.de>,
        Rik van Riel <riel@...riel.com>
Subject: Re: [GIT PULL] x86/mm changes for v4.21



> On Feb 7, 2019, at 2:53 PM, Linus Torvalds <torvalds@...ux-foundation.org> wrote:
> 
>> On Thu, Feb 7, 2019 at 1:24 PM Andy Lutomirski <luto@...capital.net> wrote:
>> 
>> How bad would it be to set CR0.CD while fiddling with the page tables rather than masking the address?
> 
> I would suggest against it. When you disable caching, things don't
> just go "slightly slower". Everything comes to a screeching halt, with
> instruction fetch etc becoming a serious problem.
> 
> So disabling caching for a few instructions in a very simple asm
> snippet might be reasonable (particularly since you could pre-fetch
> the cache and just rely on CR0.CD not fetching *new* lines). But doing
> it in C code that might have things like tracing enabled etc? I'd be
> very very leery.
> 
> 

In principle, it’s just the code that walks the page tables and changes the mode.  But we could get a perf NMI and take who knows how long to process it if caching is off.