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Message-ID: <CAJ2_jOFsyRR8tLpS6C_h1mkWh6WJjN6qFgDoSqKJGjhBieM3NQ@mail.gmail.com>
Date: Thu, 7 Feb 2019 13:54:37 +0530
From: Yash Shah <yash.shah@...ive.com>
To: Thierry Reding <thierry.reding@...il.com>
Cc: Palmer Dabbelt <palmer@...ive.com>, linux-pwm@...r.kernel.org,
linux-riscv@...ts.infradead.org, robh+dt@...nel.org,
mark.rutland@....com, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Sachin Ghadi <sachin.ghadi@...ive.com>,
Paul Walmsley <paul.walmsley@...ive.com>
Subject: Re: [PATCH v5 2/2] pwm: sifive: Add a driver for SiFive SoC PWM
On Wed, Feb 6, 2019 at 6:14 PM Thierry Reding <thierry.reding@...il.com> wrote:
>
> On Tue, Jan 29, 2019 at 05:13:19PM +0530, Yash Shah wrote:
> [...]
> > diff --git a/drivers/pwm/pwm-sifive.c b/drivers/pwm/pwm-sifive.c
> [...]
> > +static void pwm_sifive_update_clock(struct pwm_sifive_ddata *pwm,
> > + unsigned long rate)
> > +{
> > + /* (1 << (16+scale)) * 10^9/rate = real_period */
> > + unsigned long scale_pow =
> > + (pwm->approx_period * (u64)rate) / NSEC_PER_SEC;
>
> I think you need another div64_ul() for this one to fix the linker error
> that the 0-day builder was pointing out.
Yes, will fix this. Thanks for pointing it out.
>
> Thierry
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