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Message-ID: <1549565133.3075.53.camel@impinj.com>
Date: Thu, 7 Feb 2019 18:45:34 +0000
From: Trent Piepho <tpiepho@...inj.com>
To: "kishon@...com" <kishon@...com>,
"m-karicheri2@...com" <m-karicheri2@...com>,
"lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>
CC: "jingoohan1@...il.com" <jingoohan1@...il.com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"bhelgaas@...gle.com" <bhelgaas@...gle.com>,
"gustavo.pimentel@...opsys.com" <gustavo.pimentel@...opsys.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 8/9] PCI: dwc: Remove Keystone specific
dw_pcie_host_ops
On Thu, 2019-02-07 at 16:39 +0530, Kishon Vijay Abraham I wrote:
> Now that Keystone started using it's own msi_irq_chip, remove
> Keystone specific callback function defined in dw_pcie_host_ops.
>
> @@ -209,9 +195,6 @@ static void dw_pci_bottom_ack(struct irq_data *d)
>
> dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_STATUS + res, 4, 1 << bit);
>
> - if (pp->ops->msi_irq_ack)
> - pp->ops->msi_irq_ack(d->hwirq, pp);
> -
> raw_spin_unlock_irqrestore(&pp->lock, flags);
> }
After this patch, the entire function now looks like:
dw_pci_bottom_ack(struct irq_data *d)
{
struct pcie_port *pp = irq_data_get_irq_chip_data(d);
unsigned int res, bit, ctrl;
unsigned long flags;
ctrl = d->hwirq / MAX_MSI_IRQS_PER_CTRL;
res = ctrl * MSI_REG_CTRL_BLOCK_SIZE;
bit = d->hwirq % MAX_MSI_IRQS_PER_CTRL;
raw_spin_lock_irqsave(&pp->lock, flags);
dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_STATUS + res, 4, 1 << bit);
raw_spin_unlock_irqrestore(&pp->lock, flags);
}
The spin lock isn't necessary anymore since there is nothing but a
single register write inside the critical section.
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