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Message-ID: <a0b12a7f-b341-28a2-edb8-b573d39f6e1b@synopsys.com>
Date: Mon, 11 Feb 2019 10:19:47 +0000
From: Gustavo Pimentel <gustavo.pimentel@...opsys.com>
To: Kishon Vijay Abraham I <kishon@...com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
Alan Douglas <adouglas@...ence.com>,
"Shawn Lin" <shawn.lin@...k-chips.com>,
Heiko Stuebner <heiko@...ech.de>
CC: Bjorn Helgaas <bhelgaas@...gle.com>,
Jingoo Han <jingoohan1@...il.com>,
"linux-omap@...r.kernel.org" <linux-omap@...r.kernel.org>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-rockchip@...ts.infradead.org"
<linux-rockchip@...ts.infradead.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v2 00/15] PCI: endpoint: Cleanup EPC features
Hi,
On 14/01/2019 11:14, Kishon Vijay Abraham I wrote:
> Hi Lorenzo,
>
> The Endpoint controller driver uses features member in 'struct pci_epc'
> to advertise the list of supported features to the endpoint function
> driver.
>
> There are a few shortcomings with this approach.
> *) Certain endpoint controllers support fixed size BAR (e.g. TI's
> AM654 uses Designware configuration with fixed size BAR). The
> size of each BARs cannot be passed to the endpoint function
> driver.
> *) Too many macros for handling EPC features.
> (EPC_FEATURE_NO_LINKUP_NOTIFIER, EPC_FEATURE_BAR_MASK,
> EPC_FEATURE_MSIX_AVAILABLE, EPC_FEATURE_SET_BAR,
> EPC_FEATURE_GET_BAR)
> *) Endpoint controllers are directly modifying struct pci_epc
> members. (I have plans to move struct pci_epc to
> drivers/pci/endpoint so that pci_epc members are referenced
> only by endpoint core).
>
> To overcome the above shortcomings, introduced pci_epc_get_features()
> API, pci_epc_features structure and a ->get_features() callback.
>
> Also added a patch to set BAR flags in pci_epf_alloc_space and
> remove it from pci-epf-test function driver.
>
> Changes from v1:
> *) Fixed helper function to return '0' (or BAR_0) for any incorrect
> values in reserved BAR.
> *) Do not set_bar or alloc space for BARs if the BARs are reserved
> *) Fix incorrect check of epc_features in pci_epf_test_bind
>
> Tested on TI's DRA7xx platform and AM654 platform. Support for PCIe
> in AM654 platform will be posted shortly.
>
> Kishon Vijay Abraham I (15):
> PCI: endpoint: Add new pci_epc_ops to get EPC features
> PCI: dwc: Add ->get_features() callback function in dw_pcie_ep_ops
> PCI: designware-plat: Populate ->get_features() dw_pcie_ep_ops
> PCI: pci-dra7xx: Populate ->get_features() dw_pcie_ep_ops
> PCI: rockchip: Populate ->get_features() dw_pcie_ep_ops
> PCI: cadence: Populate ->get_features() cdns_pcie_epc_ops
> PCI: endpoint: Add helper to get first unreserved BAR
> PCI: endpoint: Fix pci_epf_alloc_space to set correct MEM TYPE flags
> PCI: pci-epf-test: Remove setting epf_bar flags in function driver
> PCI: pci-epf-test: Do not allocate next BARs memory if current BAR is
> 64Bit
> PCI: pci-epf-test: Use pci_epc_get_features to get EPC features
> PCI: cadence: Remove pci_epf_linkup from Cadence EP driver
> PCI: rockchip: Remove pci_epf_linkup from Rockchip EP driver
> PCI: designware-plat: Remove setting epc->features in Designware plat
> EP driver
> PCI: endpoint: Remove features member in struct pci_epc
>
> drivers/pci/controller/dwc/pci-dra7xx.c | 13 +++
> .../pci/controller/dwc/pcie-designware-ep.c | 12 +++
> .../pci/controller/dwc/pcie-designware-plat.c | 17 +++-
> drivers/pci/controller/dwc/pcie-designware.h | 1 +
> drivers/pci/controller/pcie-cadence-ep.c | 25 ++---
> drivers/pci/controller/pcie-rockchip-ep.c | 16 +++-
> drivers/pci/endpoint/functions/pci-epf-test.c | 93 ++++++++++++-------
> drivers/pci/endpoint/pci-epc-core.c | 53 +++++++++++
> drivers/pci/endpoint/pci-epf-core.c | 4 +-
> include/linux/pci-epc.h | 31 +++++--
> 10 files changed, 201 insertions(+), 64 deletions(-)
>
Sorry for the delay, I had a problem with my setup.
Tested-by: Gustavo Pimentel <gustavo.pimentel@...opsys.com>
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