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Message-ID: <a0917630-489c-3ca4-e965-5a4ef2e4c4ca@wdc.com>
Date:   Thu, 14 Feb 2019 10:21:05 -0800
From:   Atish Patra <atish.patra@....com>
To:     Daniel Lezcano <daniel.lezcano@...aro.org>,
        "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>
Cc:     Alan Kao <alankao@...estech.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Andreas Schwab <schwab@...e.de>,
        Anup Patel <anup@...infault.org>,
        Dmitriy Cherkasov <dmitriy@...-tech.org>,
        Guenter Roeck <linux@...ck-us.net>,
        Jason Cooper <jason@...edaemon.net>,
        Johan Hovold <johan@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Marc Zyngier <marc.zyngier@....com>,
        Palmer Dabbelt <palmer@...ive.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Thomas Gleixner <tglx@...utronix.de>
Subject: Re: [v5 PATCH 6/8] clocksource/drivers/riscv: Add required checks
 during clock source init

On 2/14/19 2:24 AM, Daniel Lezcano wrote:
> On 13/02/2019 21:18, Atish Patra wrote:
>> Currently, clocksource registration happens for an invalid cpu for
>> non-smp kernels. This lead to kernel panic as cpu hotplug registration
>> will fail for those cpus. Moreover, riscv_hartid_to_cpuid can return
>> errors now.
>>
>> Do not proceed if hartid or cpuid is invalid. Take this opprtunity to
>> print appropriate error strings for different failure cases.
>>
>> Signed-off-by: Atish Patra <atish.patra@....com>
> 
> Hi Atish,
> 
> I applied this patch for 5.1 with the typo fixed and the reviewed-by tags.
> 
>    -- Daniel
> 

Thanks!!

Regards,
Atish
>> ---
>>   drivers/clocksource/timer-riscv.c | 23 ++++++++++++++++++++---
>>   1 file changed, 20 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
>> index 43189220..e8163693 100644
>> --- a/drivers/clocksource/timer-riscv.c
>> +++ b/drivers/clocksource/timer-riscv.c
>> @@ -95,13 +95,30 @@ static int __init riscv_timer_init_dt(struct device_node *n)
>>   	struct clocksource *cs;
>>   
>>   	hartid = riscv_of_processor_hartid(n);
>> +	if (hartid < 0) {
>> +		pr_warn("Not valid hartid for node [%pOF] error = [%d]\n",
>> +			n, hartid);
>> +		return hartid;
>> +	}
>> +
>>   	cpuid = riscv_hartid_to_cpuid(hartid);
>> +	if (cpuid < 0) {
>> +		pr_warn("Invalid cpuid for hartid [%d]\n", hartid);
>> +		return cpuid;
>> +	}
>>   
>>   	if (cpuid != smp_processor_id())
>>   		return 0;
>>   
>> +	pr_info("%s: Registering clocksource cpuid [%d] hartid [%d]\n",
>> +	       __func__, cpuid, hartid);
>>   	cs = per_cpu_ptr(&riscv_clocksource, cpuid);
>> -	clocksource_register_hz(cs, riscv_timebase);
>> +	error = clocksource_register_hz(cs, riscv_timebase);
>> +	if (error) {
>> +		pr_err("RISCV timer register failed [%d] for cpu = [%d]\n",
>> +		       error, cpuid);
>> +		return error;
>> +	}
>>   
>>   	sched_clock_register(riscv_sched_clock,
>>   			BITS_PER_LONG, riscv_timebase);
>> @@ -110,8 +127,8 @@ static int __init riscv_timer_init_dt(struct device_node *n)
>>   			 "clockevents/riscv/timer:starting",
>>   			 riscv_timer_starting_cpu, riscv_timer_dying_cpu);
>>   	if (error)
>> -		pr_err("RISCV timer register failed [%d] for cpu = [%d]\n",
>> -		       error, cpuid);
>> +		pr_err("cpu hp setup state failed for RISCV timer [%d]\n",
>> +		       error);
>>   	return error;
>>   }
>>   
>>
> 
> 

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