linux-kernel - Re: [PATCH v1] mmc: mmc: Fix HS setting in mmc_hs400_to

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Thu, 14 Feb 2019 09:14:39 +0100
From:   Ulf Hansson <ulf.hansson@...aro.org>
To:     Chaotian Jing <chaotian.jing@...iatek.com>
Cc:     Matthias Brugger <matthias.bgg@...il.com>,
        Shawn Lin <shawn.lin@...k-chips.com>,
        Simon Horman <horms+renesas@...ge.net.au>,
        Kyle Roeschley <kyle.roeschley@...com>,
        Hongjie Fang <hongjiefang@...micro.com>,
        Harish Jenny K N <harish_kandiga@...tor.com>,
        "linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        linux-mediatek@...ts.infradead.org,
        srv_heupstream <srv_heupstream@...iatek.com>,
        Adrian Hunter <adrian.hunter@...el.com>
Subject: Re: [PATCH v1] mmc: mmc: Fix HS setting in mmc_hs400_to_hs200()

On Thu, 14 Feb 2019 at 03:14, Chaotian Jing <chaotian.jing@...iatek.com> wrote:
>
> On Wed, 2019-02-13 at 13:08 +0100, Ulf Hansson wrote:
> > On Wed, 13 Feb 2019 at 10:07, Chaotian Jing <chaotian.jing@...iatek.com> wrote:
> > >
> > > mmc_hs400_to_hs200() begins with the card and host in HS400 mode.
> > > Therefore, any commands sent to the card should use HS400 timing.
> > > reduce clock frequency to 50Mhz but without host timming change
> > > may cause CMD6 response CRC error. because host still running at
> > > hs400 mode, and it's hard to find a suitable setting for all eMMC
> > > cards when clock frequency reduced to 50Mhz but card & host still
> > > in hs400 mode.
> > > this patch refers to mmc_select_hs400(), make the reduce clock frequency
> > > after card timing change.
> > >
> > > Signed-off-by: Chaotian Jing <chaotian.jing@...iatek.com>
> > > Fixes: ef3d232245ab ("mmc: mmc: Relax checking for switch errors after HS200 switch")
> > > ---
> > >  drivers/mmc/core/mmc.c | 29 +++++++++++++++++++++++------
> > >  1 file changed, 23 insertions(+), 6 deletions(-)
> > >
> > > diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
> > > index 09c688f..00adc2d 100644
> > > --- a/drivers/mmc/core/mmc.c
> > > +++ b/drivers/mmc/core/mmc.c
> > > @@ -1239,20 +1239,37 @@ int mmc_hs400_to_hs200(struct mmc_card *card)
> > >         int err;
> > >         u8 val;
> > >
> > > -       /* Reduce frequency to HS */
> > > -       max_dtr = card->ext_csd.hs_max_dtr;
> > > -       mmc_set_clock(host, max_dtr);
> > > -
> > >         /* Switch HS400 to HS DDR */
> > >         val = EXT_CSD_TIMING_HS;
> > >         err = __mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING,
> > >                            val, card->ext_csd.generic_cmd6_time, 0,
> > >                            true, false, true);
> > > -       if (err)
> > > -               goto out_err;
> > > +       /*
> > > +        * as we are on the way to do re-tune, so if the CMD6 got response CRC
> > > +        * error, do not treat it as error.
> > > +        */
> > > +       if (err) {
> > > +               if (err == -EILSEQ) {
> > > +                       /*
> > > +                        * card will busy after sending out response and host
> > > +                        * driver may not wait busy de-assert when get
> > > +                        * response CRC error. so just wait enough time to
> > > +                        * ensure card leave busy state.
> > > +                        */
> > > +                       mmc_delay(card->ext_csd.generic_cmd6_time);
> > > +                       pr_debug("%s: %s switch to HS got CRC error\n",
> > > +                                mmc_hostname(host), __func__);
> > > +               } else {
> > > +                       goto out_err;
> > > +               }
> > > +       }
> > >
> > >         mmc_set_timing(host, MMC_TIMING_MMC_DDR52);
> > >
> > > +       /* Reduce frequency to HS */
> > > +       max_dtr = card->ext_csd.hs_max_dtr;
> > > +       mmc_set_clock(host, max_dtr);
> > > +
> >
> > What Adrian suggested was to not to move this part, but instead, only
> > allow CRC errors from the CMD6 as above.
> >
> > I guess it didn't work for you?
> >
> It should work for me. another issue is CMD6 will be sent 3 times at max

Alright, let's give it a try then.

>  err = mmc_wait_for_cmd(host, &cmd, MMC_CMD_RETRIES);

Yeah, that one have I thought about earlier as well.

>
> if the first CMD6 got response CRC error, then Host driver must wait
> busy signal de-assert before send the next CMD6.
>
> So that it really make sense to issue CMD6(R1B) for 3 times ? if host
> driver did not handle the first CMD6 response CRC error and send second
> CMD6 directly, then this CMD6 will get timeout due to card still in busy
> state.

I fully agree with you, I don't think it makes sense to retry - not
even for any CMD6, because of the busy signalling the card may raise
afterwards.

Perhaps we should start with a simple oneliner patch, giving zero
instead of MMC_CMD_RETRIES to mmc_wait_for_cmd() and see how that
plays.

Then on top we can add the special error handling of the CRC errors,
along the lines of what you suggest.

Does it make sense?

[...]

Kind regards
Uffe