[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <DM5PR18MB1067E1DD47E7094E02043A58B0630@DM5PR18MB1067.namprd18.prod.outlook.com>
Date: Mon, 18 Feb 2019 11:08:34 +0000
From: Stefan Chulski <stefanc@...vell.com>
To: Antoine Tenart <antoine.tenart@...tlin.com>,
"Russell King - ARM Linux admin" <linux@...linux.org.uk>
CC: "davem@...emloft.net" <davem@...emloft.net>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"thomas.petazzoni@...tlin.com" <thomas.petazzoni@...tlin.com>,
"maxime.chevallier@...tlin.com" <maxime.chevallier@...tlin.com>,
"gregory.clement@...tlin.com" <gregory.clement@...tlin.com>,
"miquel.raynal@...tlin.com" <miquel.raynal@...tlin.com>,
Nadav Haklai <nadavh@...vell.com>,
Yan Markman <ymarkman@...vell.com>,
"mw@...ihalf.com" <mw@...ihalf.com>
Subject: RE: [EXT] Re: [PATCH net-next 10/13] net: mvpp2: reset the XPCS while
reconfiguring the serdes lanes
> -----Original Message-----
> From: Antoine Tenart <antoine.tenart@...tlin.com>
> Sent: Monday, February 18, 2019 12:52 PM
> To: Russell King - ARM Linux admin <linux@...linux.org.uk>
> Cc: Antoine Tenart <antoine.tenart@...tlin.com>; davem@...emloft.net;
> netdev@...r.kernel.org; linux-kernel@...r.kernel.org;
> thomas.petazzoni@...tlin.com; maxime.chevallier@...tlin.com;
> gregory.clement@...tlin.com; miquel.raynal@...tlin.com; Nadav Haklai
> <nadavh@...vell.com>; Stefan Chulski <stefanc@...vell.com>; Yan
> Markman <ymarkman@...vell.com>; mw@...ihalf.com
> Subject: [EXT] Re: [PATCH net-next 10/13] net: mvpp2: reset the XPCS while
> reconfiguring the serdes lanes
>
> External Email
>
> ----------------------------------------------------------------------
> Russell,
>
> On Mon, Feb 18, 2019 at 10:47:57AM +0000, Russell King - ARM Linux admin
> wrote:
> >
> > Another case that needs to be considered: if the XPCS should be placed
> > into reset while reconfiguring the serdes lanes, is the same treatment
> > needed for the GMAC?
>
> That's something I wanted to check as well. I don't know for the GMAC, while
> I'm sure the documentation explicitly state to put the XPCS in reset when
> reconfiguring the lanes.
HW recommendation upon Serdes reconfiguration are the following:
1. Disable port(CTRL0_REG - in XLG/GMAC)
2. Put port in reset (both XLG/GMAC)
3. For KR - put in reset MPCS (MAC control clock, RX SD clock, TX SD clock), XPSC is RXAUI/XAUI clock domain
4. Power down Serdes lane
Do reconfiguration of Serdes.
5. Enable Serdes lane
6. Disable MPCS reset for KR
7. Disable port reset (both XLG/GMAC)
8. Enable port (both XLG/GMAC)
Stefan,
Best Regards.
Powered by blists - more mailing lists