lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAE=gft5vUoxNgYfGEQ_KVQ7OfJxXG3R_jv6nbiNdM86uVHJ4fQ@mail.gmail.com>
Date:   Tue, 19 Feb 2019 15:29:41 -0800
From:   Evan Green <evgreen@...omium.org>
To:     Yong Wu <yong.wu@...iatek.com>
Cc:     Joerg Roedel <joro@...tes.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Robin Murphy <robin.murphy@....com>,
        Rob Herring <robh+dt@...nel.org>,
        Tomasz Figa <tfiga@...gle.com>,
        Will Deacon <will.deacon@....com>,
        linux-mediatek@...ts.infradead.org, srv_heupstream@...iatek.com,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>, LKML <linux-kernel@...r.kernel.org>,
        linux-arm-kernel@...ts.infradead.org,
        iommu@...ts.linux-foundation.org, yingjoe.chen@...iatek.com,
        youlin.pei@...iatek.com, Nicolas Boichat <drinkcat@...omium.org>,
        anan.sun@...iatek.com, Matthias Kaehlcke <mka@...omium.org>
Subject: Re: [PATCH v6 06/22] iommu/io-pgtable-arm-v7s: Extend MediaTek 4GB Mode

On Sun, Feb 17, 2019 at 1:07 AM Yong Wu <yong.wu@...iatek.com> wrote:
>
> MediaTek extend the arm v7s descriptor to support the dram over 4GB.
>
> In the mt2712 and mt8173, it's called "4GB mode", the physical address
> is from 0x4000_0000 to 0x1_3fff_ffff, but from EMI point of view, it
> is remapped to high address from 0x1_0000_0000 to 0x1_ffff_ffff, the
> bit32 is always enabled. thus, in the M4U, we always enable the bit9
> for all PTEs which means to enable bit32 of physical address.
>
> but in mt8183, M4U support the dram from 0x4000_0000 to 0x3_ffff_ffff
> which isn't remaped. We extend the PTEs: the bit9 represent bit32 of
> PA and the bit4 represent bit33 of PA. Meanwhile the iova still is
> 32bits.
>
> In order to unify code, in the "4GB mode", we add the bit32 for the
> physical address manually in our driver.
>
> Correspondingly, Adding bit32 and bit33 for the PA in the iova_to_phys
> has to been moved into v7s.
>
> Regarding whether the pagetable address could be over 4GB, the mt8183
> support it while the previous mt8173 don't. thus keep it as is.
>
> Signed-off-by: Yong Wu <yong.wu@...iatek.com>
> Reviewed-by: Robin Murphy <robin.murphy@....com>
> ---
> Comparing the previous version, I add MTK_4GB quirk always since mtk_iommu
> has already controlled the PA itself. Helped from Evan.

Thanks for all the explanation on this one. I think I understand it
now, and it looks good to me.

Reviewed-by: Evan Green <evgreen@...omium.org>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ