linux-kernel - Re: [PATCH v6 13/22] iommu/mediatek: Add mt8183 IOMMU support

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Date:   Tue, 19 Feb 2019 15:31:22 -0800
From:   Evan Green <evgreen@...omium.org>
To:     Yong Wu <yong.wu@...iatek.com>
Cc:     Joerg Roedel <joro@...tes.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Robin Murphy <robin.murphy@....com>,
        Rob Herring <robh+dt@...nel.org>,
        Tomasz Figa <tfiga@...gle.com>,
        Will Deacon <will.deacon@....com>,
        linux-mediatek@...ts.infradead.org, srv_heupstream@...iatek.com,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>, LKML <linux-kernel@...r.kernel.org>,
        linux-arm-kernel@...ts.infradead.org,
        iommu@...ts.linux-foundation.org, yingjoe.chen@...iatek.com,
        youlin.pei@...iatek.com, Nicolas Boichat <drinkcat@...omium.org>,
        anan.sun@...iatek.com, Matthias Kaehlcke <mka@...omium.org>
Subject: Re: [PATCH v6 13/22] iommu/mediatek: Add mt8183 IOMMU support

On Sun, Feb 17, 2019 at 1:08 AM Yong Wu <yong.wu@...iatek.com> wrote:
>
> The M4U IP blocks in mt8183 is MediaTek's generation2 M4U which use
> the ARM Short-descriptor like mt8173, and most of the HW registers
> are the same.
>
> Here list main differences between mt8183 and mt8173/mt2712:
> 1) mt8183 has only one M4U HW like mt8173 while mt2712 has two.
> 2) mt8183 don't have the "bclk" clock, it use the EMI clock instead.
> 3) mt8183 can support the dram over 4GB, but it doesn't call this "4GB
> mode".
> 4) mt8183 pgtable base register(0x0) extend bit[1:0] which represent
> the bit[33:32] in the physical address of the pgtable base, But the
> standard ttbr0[1] means the S bit which is enabled defaultly, Hence,
> we add a mask.
> 5) mt8183 HW has a GALS modules, SMI should enable "has_gals" support.
> 6) mt8183 need reset_axi like mt8173.
> 7) the larb-id in smi-common is remapped. M4U should add its larbid_remap.
>
> Signed-off-by: Yong Wu <yong.wu@...iatek.com>

Reviewed-by: Evan Green <evgreen@...omium.org>