lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Wed, 20 Feb 2019 11:37:09 -0800
From:   Stephen Boyd <sboyd@...nel.org>
To:     CK Hu <ck.hu@...iatek.com>,
        Michael Turquette <mturquette@...libre.com>,
        wangyan wang <wangyan.wang@...iatek.com>
Cc:     wangyan wang <wangyan.wang@...iatek.com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        David Airlie <airlied@...ux.ie>,
        Daniel Vetter <daniel@...ll.ch>,
        chunhui dai <chunhui.dai@...iatek.com>,
        Colin Ian King <colin.king@...onical.com>,
        Sean Wang <sean.wang@...iatek.com>,
        Ryder Lee <ryder.lee@...iatek.com>, linux-clk@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org,
        dri-devel@...ts.freedesktop.org, srv_heupstream@...iatek.com
Subject: Re: [PATCH V5 5/8] clk: mediatek: add MUX_GATE_FLAGS_2

Quoting wangyan wang (2019-02-19 18:53:54)
> From: chunhui dai <chunhui.dai@...iatek.com>
> 
> Add MUX_GATE_FLAGS_2 for the clock which needs to set two falgs.

s/falgs/flags/

> Such as some mux need to set the flags of "CLK_MUX_ROUND_CLOSEST".
> 
> Signed-off-by: chunhui dai <chunhui.dai@...iatek.com>
> Signed-off-by: wangyan wang <wangyan.wang@...iatek.com>
> ---
>  drivers/clk/mediatek/clk-mtk.c |  2 +-
>  drivers/clk/mediatek/clk-mtk.h | 20 ++++++++++++++------
>  2 files changed, 15 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
> index 9c0ae4278a94..2ed996404804 100644
> --- a/drivers/clk/mediatek/clk-mtk.c
> +++ b/drivers/clk/mediatek/clk-mtk.c
> @@ -167,7 +167,7 @@ struct clk *mtk_clk_register_composite(const struct mtk_composite *mc,
>                 mux->mask = BIT(mc->mux_width) - 1;
>                 mux->shift = mc->mux_shift;
>                 mux->lock = lock;
> -
> +               mux->flags = mc->mux_flags;
>                 mux_hw = &mux->hw;
>                 mux_ops = &clk_mux_ops;
>  
> diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h
> index f83c2bbb677e..4b88d196d52f 100644
> --- a/drivers/clk/mediatek/clk-mtk.h
> +++ b/drivers/clk/mediatek/clk-mtk.h
> @@ -81,15 +81,13 @@ struct mtk_composite {
>         signed char divider_shift;
>         signed char divider_width;
>  
> +       unsigned char mux_flags;

Why isn't it an unsigned long? Isn't this supposed to match the
frameworks version of the clk flags?

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ