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Message-ID: <1550716451.23876.5.camel@mszsdaap41>
Date: Thu, 21 Feb 2019 10:34:11 +0800
From: mtk14994 <wangyan.wang@...iatek.com>
To: Stephen Boyd <sboyd@...nel.org>
CC: CK Hu <ck.hu@...iatek.com>,
Michael Turquette <mturquette@...libre.com>,
Ryder Lee <ryder.lee@...iatek.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
<srv_heupstream@...iatek.com>,
chunhui dai <chunhui.dai@...iatek.com>,
David Airlie <airlied@...ux.ie>,
Sean Wang <sean.wang@...iatek.com>,
<linux-kernel@...r.kernel.org>,
<linux-mediatek@...ts.infradead.org>,
<dri-devel@...ts.freedesktop.org>,
"Daniel Vetter" <daniel@...ll.ch>,
Matthias Brugger <matthias.bgg@...il.com>,
"Colin Ian King" <colin.king@...onical.com>,
<linux-clk@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH V5 5/8] clk: mediatek: add MUX_GATE_FLAGS_2
Dear Stephen,
> + unsigned char mux_flags;
>
> Why isn't it an unsigned long? Isn't this supposed to match the
> frameworks version of the clk flags?
----> it is unsigned char mux_flags ,becasuse struct clk_mux {
....
....
u8 flags;
....
}
it is matched when use " mux->flags = mc->mux_flags;"
Best Regards
Wangyan
On Wed, 2019-02-20 at 11:37 -0800, Stephen Boyd wrote:
> Quoting wangyan wang (2019-02-19 18:53:54)
> > From: chunhui dai <chunhui.dai@...iatek.com>
> >
> > Add MUX_GATE_FLAGS_2 for the clock which needs to set two falgs.
>
> s/falgs/flags/
>
> > Such as some mux need to set the flags of "CLK_MUX_ROUND_CLOSEST".
> >
> > Signed-off-by: chunhui dai <chunhui.dai@...iatek.com>
> > Signed-off-by: wangyan wang <wangyan.wang@...iatek.com>
> > ---
> > drivers/clk/mediatek/clk-mtk.c | 2 +-
> > drivers/clk/mediatek/clk-mtk.h | 20 ++++++++++++++------
> > 2 files changed, 15 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
> > index 9c0ae4278a94..2ed996404804 100644
> > --- a/drivers/clk/mediatek/clk-mtk.c
> > +++ b/drivers/clk/mediatek/clk-mtk.c
> > @@ -167,7 +167,7 @@ struct clk *mtk_clk_register_composite(const struct mtk_composite *mc,
> > mux->mask = BIT(mc->mux_width) - 1;
> > mux->shift = mc->mux_shift;
> > mux->lock = lock;
> > -
> > + mux->flags = mc->mux_flags;
> > mux_hw = &mux->hw;
> > mux_ops = &clk_mux_ops;
> >
> > diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h
> > index f83c2bbb677e..4b88d196d52f 100644
> > --- a/drivers/clk/mediatek/clk-mtk.h
> > +++ b/drivers/clk/mediatek/clk-mtk.h
> > @@ -81,15 +81,13 @@ struct mtk_composite {
> > signed char divider_shift;
> > signed char divider_width;
> >
> > + unsigned char mux_flags;
>
> Why isn't it an unsigned long? Isn't this supposed to match the
> frameworks version of the clk flags?
>
>
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@...ts.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
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