linux-kernel - RE: [EXT] [PATCH v6 2/2] mtd: spi-nor: cadence-quadspi: Add support for Octal SPI controller

Open Source and information security mailing list archives

Message-ID: <BYAPR08MB453362F4253ADA149D05315FDB7E0@BYAPR08MB4533.namprd08.prod.outlook.com>
Date:   Thu, 21 Feb 2019 10:41:33 +0000
From:   "Bean Huo (beanhuo)" <beanhuo@...ron.com>
To:     Vignesh R <vigneshr@...com>,
        Boris Brezillon <bbrezillon@...nel.org>,
        "Tudor.Ambarus@...rochip.com" <Tudor.Ambarus@...rochip.com>
CC:     "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Marek Vasut <marek.vasut@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        "linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>
Subject: RE: [EXT] [PATCH v6 2/2] mtd: spi-nor: cadence-quadspi: Add support
 for Octal SPI controller

Hi, Vignesh

>
>Cadence OSPI controller IP supports Octal IO (x8 IO lines), It also has an
>integrated PHY. IP register layout is very similar to existing QSPI IP except for
>additional bits to support Octal and Octal DDR mode. Therefore, extend
>current driver to support Octal mode. Only Octal SDR read (1-1-8)mode is
>supported for now.

Does this your Cadence OSPI controller support 8-8-8 IO mode, if yes,
Why not directly enable 8-8-8 mode? 

>Tested with mt35xu512aba Octal flash on TI's AM654 EVM.
>
>Signed-off-by: Vignesh R <vigneshr@...com>
>______________________________________________________
>Linux MTD discussion mailing list
>http://lists.infradead.org/mailman/listinfo/linux-mtd/

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives