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Date:   Thu, 21 Feb 2019 11:50:01 +0100
From:   Boris Brezillon <bbrezillon@...nel.org>
To:     "Bean Huo (beanhuo)" <beanhuo@...ron.com>
Cc:     Vignesh R <vigneshr@...com>,
        "Tudor.Ambarus@...rochip.com" <Tudor.Ambarus@...rochip.com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Marek Vasut <marek.vasut@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        "linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>
Subject: Re: [EXT] [PATCH v6 2/2] mtd: spi-nor: cadence-quadspi: Add support
 for Octal SPI controller

On Thu, 21 Feb 2019 10:41:33 +0000
"Bean Huo (beanhuo)" <beanhuo@...ron.com> wrote:

> Hi, Vignesh
> 
> >
> >Cadence OSPI controller IP supports Octal IO (x8 IO lines), It also has an
> >integrated PHY. IP register layout is very similar to existing QSPI IP except for
> >additional bits to support Octal and Octal DDR mode. Therefore, extend
> >current driver to support Octal mode. Only Octal SDR read (1-1-8)mode is
> >supported for now.  
> 
> Does this your Cadence OSPI controller support 8-8-8 IO mode, if yes,
> Why not directly enable 8-8-8 mode? 
> 

Mode 8-8-8 is anyway not supported by the core (see [1] if you need
more details).

[1]https://patchwork.kernel.org/cover/10638055/

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