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Message-ID: <20190223105813.aepvfxzbjcdjvkzy@fsr-ub1664-175>
Date: Sat, 23 Feb 2019 10:58:14 +0000
From: Abel Vesa <abel.vesa@....com>
To: Stephen Boyd <sboyd@...nel.org>
CC: Aisheng Dong <aisheng.dong@....com>,
Anson Huang <anson.huang@....com>,
Fabio Estevam <fabio.estevam@....com>,
Fabio Estevam <festevam@...il.com>,
Jacky Bai <ping.bai@....com>,
Lucas Stach <l.stach@...gutronix.de>,
Sascha Hauer <kernel@...gutronix.de>,
Shawn Guo <shawnguo@...nel.org>,
dl-linux-imx <linux-imx@....com>,
"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2] clk: imx: Refactor entire sccg pll clk
On 19-02-22 09:46:23, Stephen Boyd wrote:
> Quoting Abel Vesa (2019-02-22 09:07:32)
> > Make the entire combination of plls to be one single clock. The parents used
> > for bypasses are specified each as an index in the parents list.
> > The determine_rate does a lookup throughout all the possible combinations
> > for all the divs and returns the best possible 'setup' which in turn is used
> > by set_rate later to set up all the divs and bypasses.
> >
> > Signed-off-by: Abel Vesa <abel.vesa@....com>
> > Tested-by: Lucas Stach <l.stach@...gutronix.de>
> > Acked-by: Lucas Stach <l.stach@...gutronix.de>
>
> I suspect these tested by and acked tags should have been dropped,
> unless you discussed and tested off-list?
>
Oups, I forgot to drop them.
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