[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAErSpo5CesyZkJ_2gFJtVh_Dtac3gY1YRLiRn25mazuRsHVovQ@mail.gmail.com>
Date: Mon, 25 Feb 2019 14:19:31 -0600
From: Bjorn Helgaas <bhelgaas@...gle.com>
To: Trent Piepho <tpiepho@...inj.com>
Cc: "stefan@...er.ch" <stefan@...er.ch>,
"leonard.crestez@....com" <leonard.crestez@....com>,
"hongxing.zhu@....com" <hongxing.zhu@....com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"jingoohan1@...il.com" <jingoohan1@...il.com>,
"lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
"gustavo.pimentel@...opsys.com" <gustavo.pimentel@...opsys.com>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"l.stach@...gutronix.de" <l.stach@...gutronix.de>,
Thinh Nguyen <thinh.nguyen@...opsys.com>
Subject: Re: [PATCH v7] PCI: imx6: limit DBI register length
[+cc Thinh]
On Mon, Feb 25, 2019 at 10:52 AM Trent Piepho <tpiepho@...inj.com> wrote:
> On Mon, 2019-02-25 at 16:15 +0000, Leonard Crestez wrote:
> > On Mon, 2019-02-25 at 17:02 +0100, Stefan Agner wrote:
> > > Define the length of the DBI registers and limit config space to its
> > > length. This makes sure that the kernel does not access registers
> > > beyond that point, avoiding the following abort on a i.MX 6Quad:
> > >
> > > +static void imx6_pcie_quirk(struct pci_dev *dev)
> > > +{
> > > + struct pci_bus *bus = dev->bus;
> > > + struct pcie_port *pp = bus->sysdata;
> > > +
> > > + if (bus->number == pp->root_bus_nr) {
> > > + struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> > > + struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci);
> > > +
> > > + /*
> > > + * Limit config length to avoid the kernel reading beyond
> > > + * the register set and causing an abort on i.MX 6Quad
> > > + */
> > > + if (imx6_pcie->drvdata->dbi_length)
> > > + dev->cfg_size = imx6_pcie->drvdata->dbi_length;
> > > + }
> > > +}
> > > +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SYNOPSYS, 0xabcd, imx6_pcie_quirk);
> >
> > This looks like a default from SYNOPSYS so it likely run on other SOCs
> > using the DesignWare PCI IP and crash because of those unchecked casts.
>
> Yes, it's used on IMX7d too. But it's worse than that, there's a USB
> controller core that uses the same vendor and device id,
> PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3. The quirk for that one uses class ==
> PCI_CLASS_SERIAL_USB_DEVICE to avoid matching this PCI-e IP. See
> thread "PCI: Check for USB xHCI class for HAPS platform"
If we could get these vendors to allocate their own Vendor/Device IDs,
maybe we could consider a DECLARE_PCI_FIXUP_EARLY quirk that would fix
up pdev->vendor and pdev->device? That might be cleaner than
cluttering all these quirks with details of this screwup.
Bjorn
Powered by blists - more mailing lists