linux-kernel - Re: [RFC PATCH] net: dsa: mv88e6xxx: support single chip sw

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Mon, 4 Mar 2019 14:45:25 +0100
From:   Andrew Lunn <andrew@...n.ch>
To:     Rasmus Villemoes <rasmus.villemoes@...vas.dk>
Cc:     Vivien Didelot <vivien.didelot@...oirfairelinux.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        Rasmus Villemoes <Rasmus.Villemoes@...vas.se>,
        Per Noergaard Christensen <pnc@...f.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [RFC PATCH] net: dsa: mv88e6xxx: support single chip sw_addr
 offset

On Mon, Mar 04, 2019 at 12:59:42PM +0000, Rasmus Villemoes wrote:
> From: Per Noergaard Christensen <pnc@...f.com>
> 
> The 88e6250 does not support multi-chip addressing. However, one can
> still have two of them on the same mdio bus, since the device only
> uses 16 of the 32 possible addresses, either addresses 0x00-0x0F or
> 0x10-0x1F depending on the ADDR4 pin at reset [since ADDR4 is
> internally pulled high, the latter is the default].
> 
> In order to prepare for supporting the 88e6250, change
> mv88e6xxx_smi_init and the single_chip_{read,write} functions to allow
> and honour a non-zero sw_addr in single chip mode. Since this only
> changes the behaviour in the sw_addr!=0 && !chip->info->multi_chip
> case from returning -EINVAL, it should not break existing setups.

Hi Rasmus

We have the nice abstraction of mv88e6xxx_smi_multi_chip_ops and
mv88e6xxx_smi_single_chip_ops. I think we should extend this
abstraction and implement mv88e6xxx_smi_dual_chip_ops. Also, add a
chip->info->dual_chip flag, so we know when it can be used.

	Andrew