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Date:   Mon, 4 Mar 2019 16:47:29 +0100
From:   Michał Mirosław <mirq-linux@...e.qmqm.pl>
To:     Dmitry Osipenko <digetx@...il.com>
Cc:     Russell King <linux@...linux.org.uk>,
        Thierry Reding <thierry.reding@...il.com>,
        Jonathan Hunter <jonathanh@...dia.com>,
        Robert Yang <decatf@...il.com>,
        linux-arm-kernel@...ts.infradead.org, linux-tegra@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v9 1/7] ARM: trusted_foundations: Support L2 cache
 maintenance

On Sun, Mar 03, 2019 at 08:12:08PM +0300, Dmitry Osipenko wrote:
> Implement L2 cache initialization firmware callback that should be
> invoked early during boot in order to set up the required outer cache
> driver's callbacks and add the callback required for L2X0 maintenance.
[...]
> @@ -43,6 +46,11 @@ void register_trusted_foundations(struct trusted_foundations_platform_data *pd);
>  void of_register_trusted_foundations(void);
>  
>  #else /* CONFIG_TRUSTED_FOUNDATIONS */
> +static inline void tf_dummy_write_sec(unsigned long val, unsigned int reg)
> +{
> +	if (reg == L2X0_CTRL && val == L2X0_CTRL_EN)
> +		pr_err("Trusted Foundations unavailable, ignoring request to enable L2C\n");
> +}
>  
>  static inline void register_trusted_foundations(
>  				   struct trusted_foundations_platform_data *pd)
> @@ -53,6 +61,10 @@ static inline void register_trusted_foundations(
>  	 */
>  	pr_err("No support for Trusted Foundations, continuing in degraded mode.\n");
>  	pr_err("Secondary processors as well as CPU PM will be disabled.\n");
> +#if IS_ENABLED(CONFIG_CACHE_L2X0)
> +	pr_err("L2X0 cache will be disabled.\n");
[...]

I guess this is redundant since tf_dummy_write_sec() will say the same
thing when trying to enable the cache.

Best Regards,
Michał Mirosław

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