lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:   Mon, 4 Mar 2019 19:40:20 +0300
From:   Dmitry Osipenko <digetx@...il.com>
To:     Michał Mirosław <mirq-linux@...e.qmqm.pl>
Cc:     Russell King <linux@...linux.org.uk>,
        Thierry Reding <thierry.reding@...il.com>,
        Jonathan Hunter <jonathanh@...dia.com>,
        Robert Yang <decatf@...il.com>,
        linux-arm-kernel@...ts.infradead.org, linux-tegra@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v9 1/7] ARM: trusted_foundations: Support L2 cache
 maintenance

04.03.2019 18:47, Michał Mirosław пишет:
> On Sun, Mar 03, 2019 at 08:12:08PM +0300, Dmitry Osipenko wrote:
>> Implement L2 cache initialization firmware callback that should be
>> invoked early during boot in order to set up the required outer cache
>> driver's callbacks and add the callback required for L2X0 maintenance.
> [...]
>> @@ -43,6 +46,11 @@ void register_trusted_foundations(struct trusted_foundations_platform_data *pd);
>>  void of_register_trusted_foundations(void);
>>  
>>  #else /* CONFIG_TRUSTED_FOUNDATIONS */
>> +static inline void tf_dummy_write_sec(unsigned long val, unsigned int reg)
>> +{
>> +	if (reg == L2X0_CTRL && val == L2X0_CTRL_EN)
>> +		pr_err("Trusted Foundations unavailable, ignoring request to enable L2C\n");
>> +}
>>  
>>  static inline void register_trusted_foundations(
>>  				   struct trusted_foundations_platform_data *pd)
>> @@ -53,6 +61,10 @@ static inline void register_trusted_foundations(
>>  	 */
>>  	pr_err("No support for Trusted Foundations, continuing in degraded mode.\n");
>>  	pr_err("Secondary processors as well as CPU PM will be disabled.\n");
>> +#if IS_ENABLED(CONFIG_CACHE_L2X0)
>> +	pr_err("L2X0 cache will be disabled.\n");
> [...]
> 
> I guess this is redundant since tf_dummy_write_sec() will say the same
> thing when trying to enable the cache.

Yes, thanks. I'll change that in the next iteration, for now will wait for awhile for more comments.

Powered by blists - more mailing lists