lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Mon, 18 Mar 2019 09:18:46 +0100
From:   Stefan Agner <stefan@...er.ch>
To:     Anson Huang <anson.huang@....com>
Cc:     thierry.reding@...il.com, robh+dt@...nel.org, mark.rutland@....com,
        shawnguo@...nel.org, s.hauer@...gutronix.de, kernel@...gutronix.de,
        festevam@...il.com, linux@...linux.org.uk, otavio@...ystems.com.br,
        Leonard Crestez <leonard.crestez@....com>,
        Robin Gong <yibin.gong@....com>, jan.tuerk@...rion.com,
        linux-pwm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        u.kleine-koenig@...gutronix.de, dl-linux-imx <linux-imx@....com>
Subject: Re: [PATCH V5 1/5] dt-bindings: pwm: Add i.MX TPM PWM binding

On 18.03.2019 08:41, Anson Huang wrote:
> Add i.MX TPM(Low Power Timer/Pulse Width Modulation Module) PWM binding.
> 
> Signed-off-by: Anson Huang <Anson.Huang@....com>
> ---
> No changes.
> ---
>  Documentation/devicetree/bindings/pwm/imx-tpm-pwm.txt | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pwm/imx-tpm-pwm.txt
> 
> diff --git a/Documentation/devicetree/bindings/pwm/imx-tpm-pwm.txt
> b/Documentation/devicetree/bindings/pwm/imx-tpm-pwm.txt
> new file mode 100644
> index 0000000..d47b8fb
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/imx-tpm-pwm.txt
> @@ -0,0 +1,19 @@
> +Freescale i.MX TPM PWM controller
> +
> +Required properties:
> +- compatible : Should be "fsl,imx-tpm-pwm".
> +- reg: Physical base address and length of the controller's registers.
> +- #pwm-cells: Should be 2. See pwm.txt in this directory for a
> description of the cells format.

It seems that the driver supports polarity. Can we use 3 cells so we can
specify the polarity in the device tree?

Also use 3 cells in the base device tree to enable other boards making
use of the polarity (arch/arm/boot/dts/imx7ulp.dtsi).

--
Stefan

> +- clocks : The clock provided by the SoC to drive the PWM.
> +- interrupts: The interrupt for the pwm controller.
> +
> +Example:
> +
> +pwm0: tpm@...50000 {
> +	compatible = "fsl,imx-tpm-pwm";
> +	reg = <0x40250000 0x1000>;
> +	assigned-clocks = <&clks IMX7ULP_CLK_LPTPM4>;
> +	assigned-clock-parents = <&clks IMX7ULP_CLK_SOSC_BUS_CLK>;
> +	clocks = <&clks IMX7ULP_CLK_LPTPM4>;
> +	#pwm-cells = <2>;
> +};

Powered by blists - more mailing lists