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Message-ID: <2fa6af66-de08-be37-7cdf-ccbf1e50ceb0@cogentembedded.com>
Date: Mon, 25 Mar 2019 22:12:10 +0300
From: Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
To: masonccyang@...c.com.tw
Cc: bbrezillon@...nel.org, broonie@...nel.org,
Geert Uytterhoeven <geert+renesas@...der.be>,
Simon Horman <horms@...ge.net.au>, juliensu@...c.com.tw,
linux-kernel@...r.kernel.org, linux-renesas-soc@...r.kernel.org,
linux-spi@...r.kernel.org, marek.vasut@...il.com,
zhengxunli@...c.com.tw
Subject: Re: [PATCH v8 1/2] spi: Add Renesas R-Car Gen3 RPC-IF SPI controller
driver
Hello!
On 03/25/2019 11:28 AM, masonccyang@...c.com.tw wrote:
>> > +static void rpc_spi_mem_set_prep_op_cfg(struct spi_device *spi,
>> > + const struct spi_mem_op *op,
>> > + u64 *offs, size_t *len)
>> > +{
>> > + struct rpc_spi *rpc = spi_controller_get_devdata(spi->controller);
>>
>> > + if (op->dummy.nbytes) {
>> > + rpc->smenr |= RPC_SMENR_DME;
>> > + rpc->dummy = RPC_SMDMCR_DMCYC(op->dummy.nbytes);
>>
>> SMDMCR.DMCYC is in bits -- you forgot to multiply by 8.
>
> ?
>
> It's dummy cycles setting, i.e,. 0 is 1 cycle dummy and
Yeah, I should've written "cycles", sorry about that.
> max is 0x13 for 20 cycle dummy, depends on transfer bit size setting = 1, 4 or 8.
> right ?
Probably...
[...]
MBR, Sergei
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