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Message-ID: <alpine.DEB.2.21.1903260053110.1789@nanos.tec.linutronix.de>
Date:   Tue, 26 Mar 2019 01:02:32 +0100 (CET)
From:   Thomas Gleixner <tglx@...utronix.de>
To:     "Liang, Kan" <kan.liang@...ux.intel.com>
cc:     Peter Zijlstra <peterz@...radead.org>,
        Andi Kleen <ak@...ux.intel.com>, acme@...nel.org,
        mingo@...hat.com, linux-kernel@...r.kernel.org, jolsa@...nel.org,
        eranian@...gle.com, alexander.shishkin@...ux.intel.com
Subject: Re: [PATCH V3 01/23] perf/x86: Support outputting XMM registers

On Mon, 25 Mar 2019, Liang, Kan wrote:
> On 3/23/2019 5:56 AM, Peter Zijlstra wrote:
> > On Fri, Mar 22, 2019 at 10:22:50AM -0700, Andi Kleen wrote:
> > > > > diff --git a/arch/x86/include/uapi/asm/perf_regs.h
> > > > > b/arch/x86/include/uapi/asm/perf_regs.h
> > > > > index f3329cabce5c..b33995313d17 100644
> > > > > --- a/arch/x86/include/uapi/asm/perf_regs.h
> > > > > +++ b/arch/x86/include/uapi/asm/perf_regs.h
> > > > > @@ -28,7 +28,29 @@ enum perf_event_x86_regs {
> > > > >   	PERF_REG_X86_R14,
> > > > >   	PERF_REG_X86_R15,
> > > > >   -	PERF_REG_X86_32_MAX = PERF_REG_X86_GS + 1,
> > > > > -	PERF_REG_X86_64_MAX = PERF_REG_X86_R15 + 1,
> > > > 
> > > > So this changes UAPI visible symbols... did we think about that?
> > > 
> > > Should be fine. Old programs won't use the new bits,
> > > and it just uses not yet used bits.
> > 
> > Old programs (that used the above symbols) will now fail to compile.
> > Even if they won't use the new bits, that seems like a bad thing.
> > 
> 
> Yes, other programs which use the PERF_REG_GPR_X86_32/64_MAX symbols should be
> broken.
> I think the new name PERF_REG_GPR_X86_32/64_MAX are more accurate. So I will
> keep both names in V4, and add comments for the old names.
> 
> /*
>  * These names are deprecated, please use new names as below to instead.

This is a pointless exercise. You can call them deprecated, but you cannot
remove them by any means. It's a userspace ABI. End of story.

>  *     PERF_REG_GPR_X86_32_MAX
>  *     PERF_REG_GPR_X86_64_MAX

Just keep the ones we have without adding new ones and just add a comment
that these are the limits for the GPRs. 

>  */
> PERF_REG_X86_32_MAX = PERF_REG_X86_GS + 1,
> PERF_REG_X86_64_MAX = PERF_REG_X86_R15 + 1,
> 
> 
> > > > > +	/* These all need two bits set because they are 128bit */
> > > > > +	PERF_REG_X86_XMM0  = 32,
> > > > > +	PERF_REG_X86_XMM1  = 34,
> > > > > +	PERF_REG_X86_XMM2  = 36,
> > > > > +	PERF_REG_X86_XMM3  = 38,
> > > > > +	PERF_REG_X86_XMM4  = 40,
> > > > > +	PERF_REG_X86_XMM5  = 42,
> > > > > +	PERF_REG_X86_XMM6  = 44,
> > > > > +	PERF_REG_X86_XMM7  = 46,
> > > > > +	PERF_REG_X86_XMM8  = 48,
> > > > > +	PERF_REG_X86_XMM9  = 50,
> > > > > +	PERF_REG_X86_XMM10 = 52,
> > > > > +	PERF_REG_X86_XMM11 = 54,
> > > > > +	PERF_REG_X86_XMM12 = 56,
> > > > > +	PERF_REG_X86_XMM13 = 58,
> > > > > +	PERF_REG_X86_XMM14 = 60,
> > > > > +	PERF_REG_X86_XMM15 = 62,
> > > > > +
> > > > > +	/* This does not include the XMMX registers */
> > > > > +	PERF_REG_GPR_X86_32_MAX = PERF_REG_X86_GS + 1,
> > > > > +	PERF_REG_GPR_X86_64_MAX = PERF_REG_X86_R15 + 1,
> > > > > +
> > > > > +	/* All registers include the XMMX registers */
> > > > > +	PERF_REG_X86_MAX = PERF_REG_X86_XMM15 + 2,

And this wants to be PERF_REG_X86_XMM_MAX so you won't run into the same
trouble when yet another register set has to be added.

Thanks,

	tglx

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