lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <bb734e20-d2c7-73f4-e2c5-3b810ccf4c81@ti.com>
Date:   Wed, 27 Mar 2019 16:44:29 +0530
From:   Sekhar Nori <nsekhar@...com>
To:     Bartosz Golaszewski <bgolaszewski@...libre.com>,
        Adam Ford <aford173@...il.com>
CC:     Bartosz Golaszewski <brgl@...ev.pl>,
        Kevin Hilman <khilman@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        David Lechner <david@...hnology.com>,
        devicetree <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        arm-soc <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v2 1/4] ARM: davinci: fix cpufreq registration on
 da850-evm

Hi Bart,

On 26/03/19 11:21 PM, Bartosz Golaszewski wrote:
> wt., 26 mar 2019 o 15:00 Adam Ford <aford173@...il.com> napisaƂ(a):
>>
>> On Fri, Mar 22, 2019 at 8:31 AM Bartosz Golaszewski <brgl@...ev.pl> wrote:
>>>
>>> From: Bartosz Golaszewski <bgolaszewski@...libre.com>
>>>
>>> The system_rev variable is never set on davinci and is always 0, so
>>> we're using the default max operating point of 300MHz. The cvdd supply
>>> comes from the tps6507 pmic and the voltage can go all the way to 1.3V
>>> so the maximum supported rate should be 456MHz.
>>
>> My understanding is that only certain revisions of the silicon can go
>> to 456MHz.   The L138's Datasheet lists both a 456 and 375 version.  I
>> cannot find a way to read a register to determine which version of the
>> silicon is available. Maybe Sekhar can confirm.
>>
> 
> Commit 28bd2c341120 ("davinci: am18x/da850/omap-l138 evm: add support
> for higher speed grades") mentions the following:
> 
> ---
> U-Boot on the EVM sets up ATAG_REVISION to inform the OS
> regarding the speed grade supported by the silicon. We use
> this information to pass on the speed grade information to
> the SoC code.
> ---
> 
> Should the system_rev somehow reflect that revision? Any way I can check it?

Can you check if the procedure in doc/README.davinci in U-Boot sources 
still works?

Environment Variables
=====================

The DA850 EVM allows the user to specify the maximum cpu clock allowed by the
silicon, in Hz, via an environment variable "maxcpuclk".

The maximum clock rate allowed depends on the silicon populated on the EVM.
Please make sure you understand the restrictions placed on this clock in the
device specific datasheet before setting up this variable. This information is
passed to the Linux kernel using the ATAG_REVISION atag.

If "maxcpuclk" is not defined, the configuration CONFIG_DA850_EVM_MAX_CPU_CLK
is used to obtain this information.

Thanks,
Sekhar

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ