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Message-ID: <CAEnQRZB8f4rHhsUoefKUB6PN_aRPtSB4y8O_D8N0_s-Zq0_8Vw@mail.gmail.com>
Date: Thu, 28 Mar 2019 10:53:59 +0200
From: Daniel Baluta <daniel.baluta@...il.com>
To: Aisheng Dong <aisheng.dong@....com>
Cc: Daniel Baluta <daniel.baluta@....com>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"mark.rutland@....com" <mark.rutland@....com>,
"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
"kernel@...gutronix.de" <kernel@...gutronix.de>,
"festevam@...il.com" <festevam@...il.com>,
dl-linux-imx <linux-imx@....com>, Peng Fan <peng.fan@....com>,
Anson Huang <anson.huang@....com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"S.j. Wang" <shengjiu.wang@....com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Teo Hall <teo.hall@....com>, yibin.gong@....com
Subject: Re: [PATCH v2 2/2] arm64: dts: imx8qxp: Add EDMA0/EDMA1 nodes
On Thu, Mar 28, 2019 at 4:32 AM Aisheng Dong <aisheng.dong@....com> wrote:
>
> > From: Daniel Baluta
> > Sent: Thursday, March 28, 2019 3:03 AM
> >
> > i.MX8QXP contains a total of 4 EDMA controllers of which two are primarily
> > for audio components and the other two are for non-audio periperhals.
> >
> > This patch adds the EDMA0/EDMA1 nodes used by audio peripherals.
> >
> > EDMA0 contains channels for:
> > * ASRC0
> > * ESAI0
> > * SPDIF0
> > * SAI0, SAI1, SAI2, SAI3
> >
> > EDMA1 contains channels for:
> > * ASRC1
> > * SAI4, SAI5
> >
> > See chapter Audio DMA Memory Maps (2.2.3) from i.MX8QXP RM [1]
> >
> > This patch is based on the dtsi file initially submitted by Teo Hall in i.MX NXP
> > internal tree.
> >
> > [1] https://www.nxp.com/docs/en/reference-manual/IMX8DQXPRM.pdf
> >
> > Cc: Teo Hall <teo.hall@....com>
> > Signed-off-by: Daniel Baluta <daniel.baluta@....com>
> > ---
> > arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 72
> > ++++++++++++++++++++++
> > 1 file changed, 72 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > index 0cb939861a60..84c7c3eca1a1 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> > @@ -182,6 +182,78 @@
> > #clock-cells = <1>;
> > };
> >
> > + edma0: dma-controller@...f0000 {
> > + compatible = "fsl,imx8qxp-edma";
> > + reg = <0x59200000 0x10000>, /* asrc0 pair A input req */
> > + <0x59210000 0x10000>, /* asrc0 pair B input req */
> > + <0x59220000 0x10000>, /* asrc0 pair C input req */
> > + <0x59230000 0x10000>, /* asrc0 pair A output req */
> > + <0x59240000 0x10000>, /* asrc0 pair B output req */
> > + <0x59250000 0x10000>, /* asrc0 pair C output req */
> > + <0x59260000 0x10000>, /* esai0 rx */
> > + <0x59270000 0x10000>, /* esai0 tx */
> > + <0x59280000 0x10000>, /* spdif0 rx */
> > + <0x59290000 0x10000>, /* spdif0 tx */
> > + <0x592c0000 0x10000>, /* sai0 rx */
> > + <0x592d0000 0x10000>, /* sai0 tx */
> > + <0x592e0000 0x10000>, /* sai1 rx */
> > + <0x592f0000 0x10000>, /* sai1 tx */
> > + #dma-cells = <3>;
>
> In binding doc, it's 2.
> - #dma-cells : Must be <2>.
> The 1st cell specifies the DMAMUX(0 for DMAMUX0 and 1 for DMAMUX1).
> Specific request source can only be multiplexed by specific channels
> group called DMAMUX.
> The 2nd cell specifies the request source(slot) ID.
>
> Need update binding doc?
>
> > + shared-interrupt;
>
> Undocumented property?
>
> Checkpatch did not complain?
Thanks Aisheng for this comment. I think we might need to delay a little bit
this patch because (as pointed by Yibin) on i.MX8 QXP/QM we use
fsl-edma-v3 which *is not* yet upstream.
So, lets get back to adding the nodes after Yibin sends edma-v3 patches.
thanks,
Daniel.
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