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Message-ID: <alpine.DEB.2.21.1904031330060.1967@nanos.tec.linutronix.de>
Date: Wed, 3 Apr 2019 13:30:47 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: nelson.dsouza@...el.com, jolsa@...hat.com,
linux-kernel@...r.kernel.org, alexander.shishkin@...ux.intel.com,
peterz@...radead.org, vincent.weaver@...ne.edu, eranian@...gle.com,
hpa@...or.com, mingo@...nel.org, torvalds@...ux-foundation.org,
acme@...hat.com
cc: linux-tip-commits@...r.kernel.org
Subject: Re: [tip:perf/urgent] perf/x86/intel: Initialize TFA MSR
On Wed, 3 Apr 2019, tip-bot for Peter Zijlstra wrote:
> Commit-ID: d7262457e35dbe239659e62654e56f8ddb814bed
> Gitweb: https://git.kernel.org/tip/d7262457e35dbe239659e62654e56f8ddb814bed
> Author: Peter Zijlstra <peterz@...radead.org>
> AuthorDate: Thu, 21 Mar 2019 13:38:49 +0100
> Committer: Ingo Molnar <mingo@...nel.org>
> CommitDate: Wed, 3 Apr 2019 11:40:32 +0200
>
> perf/x86/intel: Initialize TFA MSR
>
> Stephane reported that the TFA MSR is not initialized by the kernel,
> but the TFA bit could set by firmware or as a leftover from a kexec,
> which makes the state inconsistent.
>
> Reported-by: Stephane Eranian <eranian@...gle.com>
> Tested-by: Nelson DSouza <nelson.dsouza@...el.com>
> Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
> Cc: Alexander Shishkin <alexander.shishkin@...ux.intel.com>
> Cc: Arnaldo Carvalho de Melo <acme@...hat.com>
> Cc: Jiri Olsa <jolsa@...hat.com>
> Cc: Linus Torvalds <torvalds@...ux-foundation.org>
> Cc: Peter Zijlstra <peterz@...radead.org>
> Cc: Thomas Gleixner <tglx@...utronix.de>
> Cc: Vince Weaver <vincent.weaver@...ne.edu>
> Cc: tonyj@...e.com
> Link: https://lkml.kernel.org/r/20190321123849.GN6521@hirez.programming.kicks-ass.net
> Signed-off-by: Ingo Molnar <mingo@...nel.org>
This lacks:
1) Fixes tag
2) Cc: stable ....
Sigh.
> ---
> arch/x86/events/intel/core.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
> index 1539647ea39d..f61dcbef20ff 100644
> --- a/arch/x86/events/intel/core.c
> +++ b/arch/x86/events/intel/core.c
> @@ -3575,6 +3575,12 @@ static void intel_pmu_cpu_starting(int cpu)
>
> cpuc->lbr_sel = NULL;
>
> + if (x86_pmu.flags & PMU_FL_TFA) {
> + WARN_ON_ONCE(cpuc->tfa_shadow);
> + cpuc->tfa_shadow = ~0ULL;
> + intel_set_tfa(cpuc, false);
> + }
> +
> if (x86_pmu.version > 1)
> flip_smm_bit(&x86_pmu.attr_freeze_on_smi);
>
>
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