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Message-ID: <alpine.DEB.2.21.1904030823020.29082@macbook-air>
Date: Wed, 3 Apr 2019 08:23:52 -0400 (EDT)
From: Vince Weaver <vincent.weaver@...ne.edu>
To: Thomas Gleixner <tglx@...utronix.de>
cc: nelson.dsouza@...el.com, jolsa@...hat.com,
linux-kernel@...r.kernel.org, alexander.shishkin@...ux.intel.com,
peterz@...radead.org, vincent.weaver@...ne.edu, eranian@...gle.com,
hpa@...or.com, mingo@...nel.org, torvalds@...ux-foundation.org,
acme@...hat.com, linux-tip-commits@...r.kernel.org
Subject: Re: [tip:perf/urgent] perf/x86/intel: Initialize TFA MSR
On Wed, 3 Apr 2019, Thomas Gleixner wrote:
> On Wed, 3 Apr 2019, tip-bot for Peter Zijlstra wrote:
>
> > Commit-ID: d7262457e35dbe239659e62654e56f8ddb814bed
> > Gitweb: https://git.kernel.org/tip/d7262457e35dbe239659e62654e56f8ddb814bed
> > Author: Peter Zijlstra <peterz@...radead.org>
> > AuthorDate: Thu, 21 Mar 2019 13:38:49 +0100
> > Committer: Ingo Molnar <mingo@...nel.org>
> > CommitDate: Wed, 3 Apr 2019 11:40:32 +0200
> >
> > perf/x86/intel: Initialize TFA MSR
> >
> > Stephane reported that the TFA MSR is not initialized by the kernel,
> > but the TFA bit could set by firmware or as a leftover from a kexec,
> > which makes the state inconsistent.
> >
> > Reported-by: Stephane Eranian <eranian@...gle.com>
> > Tested-by: Nelson DSouza <nelson.dsouza@...el.com>
> > Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
> > Cc: Alexander Shishkin <alexander.shishkin@...ux.intel.com>
> > Cc: Arnaldo Carvalho de Melo <acme@...hat.com>
> > Cc: Jiri Olsa <jolsa@...hat.com>
> > Cc: Linus Torvalds <torvalds@...ux-foundation.org>
> > Cc: Peter Zijlstra <peterz@...radead.org>
> > Cc: Thomas Gleixner <tglx@...utronix.de>
> > Cc: Vince Weaver <vincent.weaver@...ne.edu>
> > Cc: tonyj@...e.com
> > Link: https://lkml.kernel.org/r/20190321123849.GN6521@hirez.programming.kicks-ass.net
> > Signed-off-by: Ingo Molnar <mingo@...nel.org>
>
> This lacks:
>
> 1) Fixes tag
>
> 2) Cc: stable ....
>
> Sigh.
It would also be nice to know what a "TFA" bit is without having to go
find a copy of the Intel documentation.
Vince
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