lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <1fcd4954-e0e8-4f93-80d3-8cbd169d0af9@gmail.com>
Date:   Mon, 08 Apr 2019 13:19:14 +0200
From:   Vicente Bergas <vicencb@...il.com>
To:     Emil Renner Berthing <emil.renner.berthing@...il.com>
Cc:     "open list:ARM/Rockchip SoC..." <linux-rockchip@...ts.infradead.org>,
        <linux-spi@...r.kernel.org>, Mark Brown <broonie@...nel.org>,
        Heiko Stuebner <heiko@...ech.de>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [BUG] Rockchip SPI: long burst writes produce unexpected result

On Sunday, April 7, 2019 9:55:10 PM CEST, Emil Renner Berthing wrote:
> Hi Vicente,
>
> On Sat, 6 Apr 2019 at 19:35, Vicente Bergas <vicencb@...il.com> wrote:
>> Hi,
>> i have been experiencing issues writing to NOR-Flash SPI Memories
>> from two RK3399-based platforms: gru-kevin and sapphire board.
>> For kevin, this resulted in a bricked device because that memory
>> is the only boot device. ...
>
> Since you say reverting the "set min/max speed" patch fixes your issues
> could you try raising the spi clock like this and see if it works for you?
>
> +       assigned-clocks = <&cru SCLK_SPI1>;
> +       assigned-clock-rates = <400000000>;
>
> Of course the driver shouldn't let you configure the spi-controller in a way
> that makes it skip bytes, but if this works for you then I still think
> you're better off explicitly setting the spi clock speed rather than having
> the driver raise it for you. At least while it does it without
> checking for errors
> or having a way to lower it again as outlined in the commit message.
>
>>     status = "okay";
>>     spidev@0 {
>>       compatible = "spidev";
>>       reg = <0>;
>>       spi-max-frequency = <50000000>;
>>     };
>>   };
>> ...
>
> /Emil
>

Hi Emil,
I've added both assigned-clocks properties to the spi1 node and tested
again. Unfortunately it still fails in a similar way:
Before the maximum write burst without errors was 47, now it is 33.
I've also tested it with an SPI bus speed of 100KHz to make sure the
external hardware is not overrun:
  ioctl SPI_IOC_WR_MAX_SPEED_HZ 100000

Regards,
  Vicenç.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ