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Message-ID: <alpine.DEB.2.21.1904081907280.2352@nanos.tec.linutronix.de>
Date: Mon, 8 Apr 2019 19:08:49 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: Sebastian Andrzej Siewior <bigeasy@...utronix.de>
cc: linux-kernel@...r.kernel.org, x86@...nel.org,
Andy Lutomirski <luto@...nel.org>,
Paolo Bonzini <pbonzini@...hat.com>,
Radim Krčmář <rkrcmar@...hat.com>,
kvm@...r.kernel.org, "Jason A. Donenfeld" <Jason@...c4.com>,
Rik van Riel <riel@...riel.com>,
Dave Hansen <dave.hansen@...ux.intel.com>
Subject: Re: [PATCH v9 00/27] x86: load FPU registers on return to userland
On Wed, 3 Apr 2019, Sebastian Andrzej Siewior wrote:
> This is a refurbished series originally started by by Rik van Riel. The
> goal is load the FPU registers on return to userland and not on every
> context switch. By this optimisation we can:
> - avoid loading the registers if the task stays in kernel and does
> not return to userland
> - make kernel_fpu_begin() cheaper: it only saves the registers on the
> first invocation. The second invocation does not need save them again.
>
> To access the FPU registers in kernel we need:
> - disable preemption to avoid that the scheduler switches tasks. By
> doing so it would set TIF_NEED_FPU_LOAD and the FPU registers would be
> not valid.
> - disable BH because the softirq might use kernel_fpu_begin() and then
> set TIF_NEED_FPU_LOAD instead loading the FPU registers on completion.
So aside of that one hunk in 24/27 which is either wrong or needs some
information in the changelog I couldn't find anything disturbing.
With that addressed:
Reviewed-by: Thomas Gleixner <tglx@...utronix.de>
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