linux-kernel - Re: [PATCH v3 1/9] ARM: dts: imx6qdl: Specify IMX6QDL_CLK

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Date:   Thu, 11 Apr 2019 10:30:09 +0800
From:   Shawn Guo <shawnguo@...nel.org>
To:     Andrey Smirnov <andrew.smirnov@...il.com>
Cc:     Lucas Stach <l.stach@...gutronix.de>,
        Angus Ainslie <angus@...ea.ca>,
        Chris Healy <cphealy@...il.com>,
        Fabio Estevam <fabio.estevam@....com>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 1/9] ARM: dts: imx6qdl: Specify IMX6QDL_CLK_IPG as
 "ipg" clock to SDMA

On Thu, Mar 28, 2019 at 11:49:16PM -0700, Andrey Smirnov wrote:
> Since 25aaa75df1e6 SDMA driver uses clock rates of "ipg" and "ahb"
> clock to determine if it needs to configure the IP block as operating
> at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both
> clocks as IMX6QDL_CLK_SDMA results in driver incorrectly thinking that
> ratio is 1:1 which results in broken SDMA funtionality(this at least
> breaks RAVE SP serdev driver on RDU2). Fix the code to specify
> IMX6QDL_CLK_IPG as "ipg" clock for SDMA, to avoid detecting incorrect
> clock ratio.
> 
> Fixes: 25aaa75df1e6 ("dmaengine: imx-sdma: add clock ratio 1:1 check")

Since we have a fix in the dma driver, I dropped the Fixes tag here.

Applied all, thanks.

Shawn

> Signed-off-by: Andrey Smirnov <andrew.smirnov@...il.com>
> Reviewed-by: Lucas Stach <l.stach@...gutronix.de>
> Cc: Angus Ainslie (Purism) <angus@...ea.ca>
> Cc: Chris Healy <cphealy@...il.com>
> Cc: Lucas Stach <l.stach@...gutronix.de>
> Cc: Fabio Estevam <fabio.estevam@....com>
> Cc: Shawn Guo <shawnguo@...nel.org>
> Cc: linux-arm-kernel@...ts.infradead.org
> Cc: linux-kernel@...r.kernel.org
> ---
>  arch/arm/boot/dts/imx6qdl.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
> index 9f9aa6e7ed0e..354feba077b2 100644
> --- a/arch/arm/boot/dts/imx6qdl.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl.dtsi
> @@ -949,7 +949,7 @@
>  				compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma";
>  				reg = <0x020ec000 0x4000>;
>  				interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>;
> -				clocks = <&clks IMX6QDL_CLK_SDMA>,
> +				clocks = <&clks IMX6QDL_CLK_IPG>,
>  					 <&clks IMX6QDL_CLK_SDMA>;
>  				clock-names = "ipg", "ahb";
>  				#dma-cells = <3>;
> -- 
> 2.20.1
>