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Date:   Fri, 12 Apr 2019 17:50:30 +0100
From:   David Howells <>
To:     Linus Torvalds <>
Cc:, Peter Zijlstra <>,
        kernel test robot <>, LKP <>,
        Linux List Kernel Mailing <>,
        Linux-MM <>,
        linux-arch <>,
        Ingo Molnar <>,
        Thomas Gleixner <>,
        Will Deacon <>,
        Andy Lutomirski <>,
        Nadav Amit <>
Subject: Re: 1808d65b55 ("asm-generic/tlb: Remove arch_tlb*_mmu()"): BUG: KASAN: stack-out-of-bounds in __change_page_attr_set_clr

Linus Torvalds <> wrote:

> We should never have stack alignment bigger than 16 bytes.  And
> preferably not even that.

At least one arch I know of (FRV) had instructions that could atomically
load/store register pairs or register quads, but they had to be pair- or
quad-aligned (ie. 8- or 16-byte), which made for more efficient code if you
could use them.

I don't know whether any arch we currently support has features like this (I
know some have multi-reg load/stores, but they seem to require only


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