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Message-ID: <13bc5836-cc0e-82f7-60ef-3ef544aa8ec2@linaro.org>
Date: Mon, 15 Apr 2019 22:14:20 +0200
From: Daniel Lezcano <daniel.lezcano@...aro.org>
To: Anson Huang <anson.huang@....com>,
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Cc: dl-linux-imx <linux-imx@....com>
Subject: Re: [PATCH RESEND V11 4/4] arm64: dts: imx: add i.MX8QXP thermal
support
On 10/04/2019 09:43, Anson Huang wrote:
> Add i.MX8QXP CPU thermal zone support.
>
> Signed-off-by: Anson Huang <Anson.Huang@....com>
> ---
> Changes since V10:
> - remove property "imx,sensor-resource-id" and put HW resource ID inside each
> thermal-sensors' phandle argument.
> ---
> arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 33 ++++++++++++++++++++++++++++++
> 1 file changed, 33 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> index 70ef3db..cc1d877 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> @@ -10,6 +10,7 @@
> #include <dt-bindings/gpio/gpio.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/pinctrl/pads-imx8qxp.h>
> +#include <dt-bindings/thermal/thermal.h>
>
> / {
> interrupt-parent = <&gic>;
> @@ -149,6 +150,11 @@
> rtc: rtc {
> compatible = "fsl,imx8qxp-sc-rtc";
> };
> +
> + tsens: thermal-sensor {
> + compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal";
> + #thermal-sensor-cells = <1>;
> + };
> };
>
> timer {
> @@ -484,4 +490,31 @@
> power-domains = <&pd IMX_SC_R_GPIO_7>;
> };
> };
> +
> + thermal_zones: thermal-zones {
> + cpu-thermal0 {
> + polling-delay-passive = <250>;
> + polling-delay = <2000>;
> + thermal-sensors = <&tsens IMX_SC_R_SYSTEM>;
> + trips {
> + cpu_alert0: trip0 {
> + temperature = <107000>;
> + hysteresis = <2000>;
> + type = "passive";
> + };
> + cpu_crit0: trip1 {
> + temperature = <127000>;
> + hysteresis = <2000>;
> + type = "critical";
> + };
> + };
> + cooling-maps {
> + map0 {
> + trip = <&cpu_alert0>;
> + cooling-device =
> + <&A35_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
<&A35_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&A35_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&A35_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&A35_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> + };
> + };
> + };
> + };
> };
>
--
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