lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <7hr2a1ojtr.fsf@baylibre.com>
Date:   Tue, 16 Apr 2019 12:01:52 -0700
From:   Kevin Hilman <khilman@...libre.com>
To:     Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
        linux-amlogic@...ts.infradead.org
Cc:     linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        jianxin.pan@...ogic.com, ccaione@...libre.com,
        Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Subject: Re: [PATCH 0/3] Meson8b: add support for the RTC on EC-100 and Odroid-C1

Martin Blumenstingl <martin.blumenstingl@...glemail.com> writes:

> This adds support for the RTC on the Meson8b EC-100 and Odroid-C1
> boards. Example kernel log snippet while booting my EC-100:
>   [    5.713750] meson-rtc c8100740.rtc: setting system clock to 2019-04-13T16:21:48 UTC (1555172508)
>
> I am only 99% sure about the naming of the clock in patch 2 and 3.
> The public S805 datasheet from Hardkernel shows (on page 24 for example)
> that clk81 can use "XTAL/32khz" as clock input. That "XTAL/32khz" clock
> is described as a mux between 24MHz (our main XTAL) and 32kHz ("that
> other XTAL").
> I believe that this other 32kHz XTAL is NOT the RTC32K crystal because:
> - schematics of the EC-100 and Odroid-C1 clearly show that the SoC input
>   for the RTC32K clock is labeled RTC32K_XI / RTC32K_XO
> - GPIOAO_6 has a CLK_32KIN function (shows in EC-100 and Odroid-C1
>   schematics as well as the public S805 datasheet)
> - Always On domain PWR_CNTL0[11:10] (public S805 datasheet page 19)
>   describes it as "Alternate 32khz input clock select from GPIO pad"
>
> Thus I believe that the naming of the RTC32K clock is correct, but I
> wanted to point out that I'm only 99% (instead of 100%) sure.
> Jianxin, please let me know if you disagree with my findings.

99% confidence is higher than we normally have, so that's fine by me. :)
And, we can fix if we get any updated info from Jianxin.

Thanks for the detailed description.

Queuing for v5.2,

Kevin

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ