linux-kernel - [tip:perf/core] perf/x86/msr: Add Icelake support

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Date:   Tue, 16 Apr 2019 04:40:19 -0700
From:   tip-bot for Kan Liang <tipbot@...or.com>
To:     linux-tip-commits@...r.kernel.org
Cc:     jolsa@...hat.com, peterz@...radead.org, mingo@...nel.org,
        alexander.shishkin@...ux.intel.com, tglx@...utronix.de,
        hpa@...or.com, acme@...hat.com, vincent.weaver@...ne.edu,
        torvalds@...ux-foundation.org, eranian@...gle.com,
        kan.liang@...ux.intel.com, linux-kernel@...r.kernel.org
Subject: [tip:perf/core] perf/x86/msr: Add Icelake support

Commit-ID:  cf50d79a8cfe5adae37fec026220b009559bbeed
Gitweb:     https://git.kernel.org/tip/cf50d79a8cfe5adae37fec026220b009559bbeed
Author:     Kan Liang <kan.liang@...ux.intel.com>
AuthorDate: Tue, 2 Apr 2019 12:45:08 -0700
Committer:  Ingo Molnar <mingo@...nel.org>
CommitDate: Tue, 16 Apr 2019 12:26:19 +0200

perf/x86/msr: Add Icelake support

Icelake is the same as the existing Skylake parts.

Signed-off-by: Kan Liang <kan.liang@...ux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
Cc: Alexander Shishkin <alexander.shishkin@...ux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@...hat.com>
Cc: Jiri Olsa <jolsa@...hat.com>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Stephane Eranian <eranian@...gle.com>
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: Vince Weaver <vincent.weaver@...ne.edu>
Cc: acme@...nel.org
Cc: jolsa@...nel.org
Link: https://lkml.kernel.org/r/20190402194509.2832-12-kan.liang@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
 arch/x86/events/msr.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c
index a878e6286e4a..f3f4c2263501 100644
--- a/arch/x86/events/msr.c
+++ b/arch/x86/events/msr.c
@@ -89,6 +89,7 @@ static bool test_intel(int idx)
 	case INTEL_FAM6_SKYLAKE_X:
 	case INTEL_FAM6_KABYLAKE_MOBILE:
 	case INTEL_FAM6_KABYLAKE_DESKTOP:
+	case INTEL_FAM6_ICELAKE_MOBILE:
 		if (idx == PERF_MSR_SMI || idx == PERF_MSR_PPERF)
 			return true;
 		break;