linux-kernel - Re: [RFC][PATCH 4/5] mips/atomic: Fix smp_mb__{before,after}

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Message-ID: <20190424212422.bykvyho3jqw6jz6w@pburton-laptop>
Date:   Wed, 24 Apr 2019 21:24:31 +0000
From:   Paul Burton <paul.burton@...s.com>
To:     Peter Zijlstra <peterz@...radead.org>
CC:     "stern@...land.harvard.edu" <stern@...land.harvard.edu>,
        "akiyks@...il.com" <akiyks@...il.com>,
        "andrea.parri@...rulasolutions.com" 
        <andrea.parri@...rulasolutions.com>,
        "boqun.feng@...il.com" <boqun.feng@...il.com>,
        "dlustig@...dia.com" <dlustig@...dia.com>,
        "dhowells@...hat.com" <dhowells@...hat.com>,
        "j.alglave@....ac.uk" <j.alglave@....ac.uk>,
        "luc.maranget@...ia.fr" <luc.maranget@...ia.fr>,
        "npiggin@...il.com" <npiggin@...il.com>,
        "paulmck@...ux.ibm.com" <paulmck@...ux.ibm.com>,
        "will.deacon@....com" <will.deacon@....com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "torvalds@...ux-foundation.org" <torvalds@...ux-foundation.org>
Subject: Re: [RFC][PATCH 4/5] mips/atomic: Fix smp_mb__{before,after}_atomic()

Hi Peter,

On Wed, Apr 24, 2019 at 02:37:00PM +0200, Peter Zijlstra wrote:
> --- a/arch/mips/include/asm/barrier.h
> +++ b/arch/mips/include/asm/barrier.h
> @@ -230,9 +238,6 @@
>  #define nudge_writes() mb()
>  #endif
>  
> -#define __smp_mb__before_atomic()	__smp_mb__before_llsc()
> -#define __smp_mb__after_atomic()	smp_llsc_mb()
> -
>  /*
>   * Some Loongson 3 CPUs have a bug wherein execution of a memory access (load,
>   * store or pref) in between an ll & sc can cause the sc instruction to

I think this bit should be part of patch 3, where you currently add a
second definition of these 2 macros.

Otherwise this one looks reasonable to me.

Thanks,
    Paul