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Message-ID: <2ca553b9-a744-534b-6b64-634c14500077@nvidia.com>
Date: Fri, 26 Apr 2019 09:06:29 +0100
From: Jon Hunter <jonathanh@...dia.com>
To: Thierry Reding <thierry.reding@...il.com>,
Kishon Vijay Abraham I <kishon@...com>
CC: JC Kuo <jckuo@...dia.com>, <linux-tegra@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
Rob Herring <robh@...nel.org>
Subject: Re: [PATCH 1/3] dt-bindings: phy: tegra-xusb: List PLL power supplies
On 25/04/2019 16:34, Thierry Reding wrote:
> From: Thierry Reding <treding@...dia.com>
>
> These power supplies provide power for various PLLs that are set up and
> driven by the XUSB pad controller. These power supplies were previously
> improperly added to the PCIe and XUSB controllers, but depending on the
> driver probe order, power to the PLLs will not be supplied soon enough
> and cause initialization to fail.
>
> Reviewed-by: Rob Herring <robh@...nel.org>
> Signed-off-by: Thierry Reding <treding@...dia.com>
For the series ...
Acked-by: Jon Hunter <jonathanh@...dia.com>
Tested-by: Jon Hunter <jonathanh@...dia.com>
Cheers
Jon
--
nvpublic
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