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Message-ID: <155657878993.168659.6676692672888882237@swboyd.mtv.corp.google.com>
Date: Mon, 29 Apr 2019 15:59:49 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Paul Walmsley <paul.walmsley@...ive.com>
Cc: devicetree@...r.kernel.org, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
Paul Walmsley <paul@...an.com>,
Wesley Terpstra <wesley@...ive.com>,
Palmer Dabbelt <palmer@...ive.com>,
Michael Turquette <mturquette@...libre.com>,
Megan Wachs <megan@...ive.com>
Subject: Re: [PATCH v3 1/3] clk: analogbits: add Wide-Range PLL library
Quoting Paul Walmsley (2019-04-29 12:42:07)
> Hi Stephen,
>
> On Fri, 26 Apr 2019, Paul Walmsley wrote:
>
> > On Fri, 26 Apr 2019, Stephen Boyd wrote:
> >
> > > Quoting Paul Walmsley (2019-04-11 01:27:32)
> > > > Add common library code for the Analog Bits Wide-Range PLL (WRPLL) IP
> > > > block, as implemented in TSMC CLN28HPC.
> > >
> > > I haven't deeply reviewed at all, but I already get two problems when
> > > compile testing these patches. I can fix them up if nothing else needs
> > > fixing.
> > >
> > > drivers/clk/analogbits/wrpll-cln28hpc.c:165 __wrpll_calc_divq() warn: should 'target_rate << divq' be a 64 bit type?
> > > drivers/clk/sifive/fu540-prci.c:214:16: error: return expression in void function
> >
> > Hmm, that's odd. I will definitely take a look and repost.
>
> I'm not able to reproduce these problems. The configs tried here were:
>
> - 64-bit RISC-V defconfig w/ PRCI driver enabled (gcc 8.2.0 built with
> crosstool-NG 1.24.0)
>
> - 32-bit ARM defconfig w/ PRCI driver enabled (gcc 8.3.0 built with
> crosstool-NG 1.24.0)
>
> - 32-bit i386 defconfig w/ PRCI driver enabled (gcc
> 5.4.0-6ubuntu1~16.04.11)
>
> Could you post the toolchain and kernel config you're using?
>
I'm running sparse and smatch too.
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